GS832272 ETC, GS832272 Datasheet - Page 7

• Manufacturer Part Number: GS832272
• Description: (GS832218 / GS832236 / GS832272) S/DCD Sync Burst SRAMs
• Manufacturer: ETC

GS832218/36 165-Bump BGA Pin Description
Rev: 1.06 9/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
ADSC, ADSP
A
Symbol
, B
A
V
TMS
TDO
MCL
SCD
DQ
DQ
DQ
DQ
ADV
LBO
TCK
V
GW
V
B
BW
TDI
NC
CK
ZQ
0
An
ZZ
E
E
E
FT
DDQ
G
, B
, A
DD
SS
1
3
2
C
D
A
B
1
C
, B
D
Type
I/O
—
—
—
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low
Byte Write Enable for DQ
Address Strobe (Processor, Cache Controller); active low
7/41
Single Cycle Deselect/Dual Cyle Deselect Mode Control
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active l0w
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
GS832218(B/E)/GS832236(B/E)/GS832272(C)
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
A
I/O and Core Ground
, DQ
Scan Test Data Out
Core power supply
Must Connect Low
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
B
, DQ
Drive])
C
, DQ
D
I/Os; active low (x36 Version)
© 2001, GSI Technology
Preliminary