CDP1805 Intersil Corporation, CDP1805 Datasheet - Page 7

• Manufacturer Part Number: CDP1805
• Description: CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
• Manufacturer: Intersil Corporation

Timing Waveforms For Possible Operating Modes
NOTE:
† For CDP1805AC only.
NOTE:
†
8. ME has a minimum setup and hold time with respect to the beginning of clock 70. For a memory read operation, RAM data will appear on
For CDP1805AC only.
the data bus during the time ME is active after clock 31. The time shown can be longer, if for instance, a DMA out operation is performed
on internal RAM data, to allow data enough time to be latched into an external device. The internal RAM is automatically deselected at
the end of clock 71 independent of ME.
ADDRESS
MEMORY
CLOCK
MEMORY
ADDRESS
DATA
MWR
MRD
BUS
TPB
†ME
TPA
CLOCK
†ME IN
(HIGH)
IN
DATA
MWR
BUS
MRD
TPB
TPA
00
00
HIGH BYTE
VALID DATA FROM MEMORY
01
HIGH BYTE
01
10
FIGURE 4. EXTERNAL MEMORY OPERATION TIMING WAVEFORMS
FIGURE 3. INTERNAL MEMORY OPERATION TIMING WAVEFORMS
10
EXTERNAL MEMORY READ CYCLE
11
INTERNAL RAM READ CYCLE
11
20
20
21
21
DATA LATCHED IN CPU
30
30
31
31
CDP1805AC, CDP1806AC
40
40
LOW BYTE
LOW BYTE
41
41
50
50
51
51
60
60
61
61
7
70
70
71
71
00
00
HIGH BYTE
HIGH BYTE
01
01
10
10
EXTERNAL MEMORY WRITE CYCLE
INTERNAL RAM WRITE CYCLE
11
11
20
20
21
21
VALID DATA FROM CPU
VALID DATA FROM CPU
30
30
31
31
40
40
LOW BYTE
LOW BYTE
41
41
50
50
51
51
60
60
61
61
70
70
71
71