GS72116AJ ETC, GS72116AJ Datasheet - Page 8

• Manufacturer Part Number: GS72116AJ
• Description: 128K x 16 2Mb Asynchronous SRAM
• Manufacturer: ETC

Read Cycle 2: WE = V
Write Cycle
* These parameters are sampled and are not 100% tested.
Rev: 1.04a 10/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Output Low Z from end of write
Address valid to end of write
Chip enable to end of write
Byte enable to end of write
Write recovery time (WE)
Write recovery time (CE)
Write to output in High Z
Address set up time
Write pulse width
Data set up time
Write cycle time
Data hold time
Parameter
IH
Address
CE
UB, LB
OE
Data Out
Symbol
tWHZ
tWLZ
tWR1
tWC
tAW
tCW
tBW
tDW
tWP
tWR
tDH
tAS
*
*
High impedance
Min
3.5
—
7
5
5
5
0
5
0
0
0
3
-7
8/18
Max
—
—
—
—
—
—
—
—
—
—
—
3
tLZ
tOLZ
tBLZ
tAA
tAC
Min
5.5
5.5
5.5
5.5
—
8
4
0
0
0
0
3
tAB
tRC
tOE
-8
Max
3.5
—
—
—
—
—
—
—
—
—
—
—
Data valid
Min
—
10
7
7
7
5
0
7
0
0
0
3
tBHZ
tOHZ
-10
tHZ
Max
—
—
—
—
—
—
—
—
—
—
—
4
© 2001, Giga Semiconductor, Inc.
GS72116ATP/J/T/U
Min
—
12
8
8
8
6
0
8
0
0
0
3
-12
Max
—
—
—
—
—
—
—
—
—
—
—
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns