EVAL-AD7843CB3 AD [Analog Devices], EVAL-AD7843CB3 Datasheet - Page 9
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EVAL-AD7843CB3
Manufacturer Part Number
EVAL-AD7843CB3
Description
Touch Screen Digitizer
Manufacturer
AD [Analog Devices]
Datasheet
1.EVAL-AD7843CB3.pdf
(16 pages)
ANALOG INPUT
Figure 4 shows an equivalent circuit of the analog input struc-
ture of the AD7843 which contains a block diagram of the input
multiplexer, the differential input of the A/D converter and the
differential reference.
Table I shows the multiplexer address corresponding to each
analog input, both for the SER/DFR bit in the control register
set high and low. The control bits are provided serially to the
device via the DIN pin. For more information on the control
register see the Control Register section.
When the converter enters the hold mode, the voltage difference
between the +IN and –IN inputs (see Figure 4) is captured on
the internal capacitor array. The input current on the analog
inputs depends on the conversion rate of the device. During the
sample period, the source must charge the internal sampling
capacitor (typically 37 pF). Once the capacitor has been fully
charged, there is no further input current. The rate of charge
transfer from the analog source to the converter is a function of
conversion rate.
IN3
IN4
X+
Y+
ON-CHIP SWITCHES
V
4-TO-1
MUX
CC
X+
X–
Y+
Y–
IN+
IN+
Acquisition Time
The track and hold amplifier enters its tracking mode on the
falling edge of the fifth DCLK after the START bit has been
detected (see Figure 13). The time required for the track and
hold amplifier to acquire an input signal will depend how
quickly the 37 pF input capacitance is charged. With zero
source impedance on the analog input three DCLK cycles will
always be sufficient to acquire the signal to the 12-bit level.
With a source impedance R
acquisition time required is calculated using the formula:
where R
100 Ω, 37 pF is the input RC value. Depending on the frequency
of DCLK used, three DCLK cycles may or may not be suffi-
cient to acquire the analog input signal with various source
impedance values.
X+ Y+
X– Y– GND
ADC CORE
IN–
3-TO-1
3-TO-1
MUX
MUX
REF+
REF–
REF
EXT
IN
is the source impedance of the input signal, and
t
ACQ
DATA OUT
= 8.4 × (R
IN
on the analog input, the actual
IN
+100 Ω) × 37 pF
AD7843