EVAL-ADN2805EBZ AD [Analog Devices], EVAL-ADN2805EBZ Datasheet - Page 7

• Manufacturer Part Number: EVAL-ADN2805EBZ
• Description: 1.25 Gbps Clock and Data Recovery IC
• Manufacturer: AD [Analog Devices]

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6, 7, 9, 22
8
10
11
12
13
14
15
16
17
18
19
20
21
23
24
25
26
27
28
29
30
31
32
Exposed Pad
1
Type: P = power, AI = analog input, AO = analog output, DI = digital input, DO = digital output.
Mnemonic
TEST1
VCC
VREF
NIN
PIN
NC
VEE
REFCLKP
REFCLKN
VCC
VEE
CF2
CF1
LOL
VEE
VCC
SADDR5
SCK
SDA
VEE
VCC
CLKOUTN
CLKOUTP
SQUELCH
DATAOUTN
DATAOUTP
VEE
VCC
TEST2
Pad
Type
P
AO
AI
AI
P
DI
DI
P
P
AO
AO
DO
P
P
DI
DI
DI
P
P
DO
DO
DI
DO
DO
P
P
P
1
* THERE IS AN EXPOSED PAD ON THE BOTTOM OF
THE PACKAGE THAT MUST BE CONNECTED TO GND.
TEST1 1
VREF 3
VCC 2
VEE 8
NIN 4
PIN 5
Description
Connect to VCC.
Power for Limiting Amplifier, LOS.
Internal VREF Voltage. Decouple to GND with a 0.1 μF capacitor.
Differential Data Input. CML.
Differential Data Input. CML.
No Connect.
GND for Limiting Amplifier, LOS.
Differential REFCLK Input. 10 MHz to 160 MHz.
Differential REFCLK Input. 10 MHz to 160 MHz.
VCO Power.
VCO GND.
Frequency Loop Capacitor.
Frequency Loop Capacitor.
Loss-of-Lock Indicator. LVTTL active high.
FLL Detector GND.
FLL Detector Power.
Slave Address Bit 5.
I
I
Output Buffer, I
Output Buffer, I
Differential Recovered Clock Output. LVDS.
Differential Recovered Clock Output. LVDS.
Disable Clock and Data Outputs. Active high. LVTTL.
Differential Recovered Data Output. LVDS.
Differential Recovered Data Output. LVDS.
Phase Detector, Phase Shifter GND.
Phase Detector, Phase Shifter Power.
Connect to VCC.
Connect to GND.
NC 6
NC 7
2
2
C Clock Input.
C Data Input.
Figure 5. Pin Configuration
Rev. 0 | Page 7 of 16
(Not to Scale)
ADN2805*
PIN 1
INDIC ATOR
TOP VIEW
2
2
C GND.
C Power.
24 VCC
23 VEE
22 NC
21 SDA
20 SCK
19 SADDR5
18 VCC
17 VEE
ADN2805