74AHC373PW,118 NXP Semiconductors, 74AHC373PW,118 Datasheet - Page 5

IC OCTAL D TRANSP LATCH 20TSSOP

74AHC373PW,118

Manufacturer Part Number
74AHC373PW,118
Description
IC OCTAL D TRANSP LATCH 20TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheet

Specifications of 74AHC373PW,118

Logic Type
D-Type Transparent Latch
Package / Case
20-TSSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
4ns
Current - Output High, Low
8mA, 8mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
AHC
Polarity
Non-Inverting
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Propagation Delay Time
4.3 ns at 5 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Dc
11+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC373PW-T
74AHC373PW-T
935262652118

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AHC373PW,118
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74AHC_AHCT373_3
Product data sheet
Symbol
D7
Q7
V
Operating mode
Enable and read register (transparent mode)
Latch and read register
Latch register and disable outputs
Symbol
V
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
I
tot
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
X = don’t care;
Z = high-impedance OFF-state.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO20 packages: above 70 C the value of P
For TSSOP20 packages: above 60 C the value of P
Pin description
Function table
Limiting values
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Pin
18
19
20
[1]
…continued
Description
data input
3-state latch output
supply voltage
tot
Control
OE
L
L
H
Conditions
V
V
V
T
derates linearly at 8 mW/K.
amb
I
O
O
tot
Rev. 03 — 20 May 2008
< 0.5 V
< 0.5 V or V
= 0.5 V to (V
derates linearly at 5.5 mW/K.
= 40 C to +125 C
LE
H
L
X
O
CC
> V
74AHC373; 74AHCT373
+ 0.5 V)
CC
+ 0.5 V
Octal D-type transparant latch; 3-state
Input
Dn
L
H
l
h
X
X
Internal
latch
L
H
L
H
X
X
[1]
[1]
[2]
Min
-
-
0.5
0.5
20
20
25
75
65
© NXP B.V. 2008. All rights reserved.
Max
+7.0
+7.0
-
+20
+25
+75
-
+150
500
Output
Q0 to Q7
L
H
L
H
Z
Z
Unit
V
V
mA
mA
mA
mA
mA
mW
C
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