74HCT573DB,118 NXP Semiconductors, 74HCT573DB,118 Datasheet - Page 17

• Manufacturer Part Number: 74HCT573DB,118
• Description: IC OCTAL D TRANSP LATCH 20SSOP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: D-Typer

Specifications of 74HCT573DB,118

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-SSOP
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 17ns
• Current - Output High, Low: 6mA, 6mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: HCT
• Polarity: Non-Inverting
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Propagation Delay Time: 17 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Bits: 8
• Number Of Elements: 1
• Latch Mode: Transparent
• Technology: CMOS
• Package Type: SSOP
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74HCT573DB-T; 74HCT573DB-T; 935186980118

Philips Semiconductors
74HC_HCT573_3
Product data sheet
Table 11:
Type
74HC573
74HCT573
Fig 9. 3-state enable and disable times
Fig 10. Set-up and hold times for data input (Dn) to latch input (LE)
Measurement points are given in
Logic levels: V
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Measurement points
HIGH-to-OFF
OFF-to-HIGH
OFF-to-LOW
LOW-to-OFF
output
OE input
output
LE input
Dn input
OL
Rev. 03 — 17 January 2006
and V
GND
GND
V
V
V
OH
CC
OL
V
I
OH
are typical output voltage drop that occur with the output load.
Input
V
0.5V
1.3 V
M
V
V
CC
M
M
enabled
Table
Table
outputs
t
su
t
PLZ
t
PHZ
11.
11.
t
V
h
M
10%
74HC573; 74HCT573
90%
Octal D-type transparent latch; 3-state
disabled
outputs
t
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
su
t
PZL
t
Output
V
0.5V
1.3 V
PZH
M
001aae084
t
h
CC
V
M
V
001aae307
M
outputs
enabled
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