74HCT573DB,118 NXP Semiconductors, 74HCT573DB,118 Datasheet - Page 2

IC OCTAL D TRANSP LATCH 20SSOP

74HCT573DB,118

Manufacturer Part Number
74HCT573DB,118
Description
IC OCTAL D TRANSP LATCH 20SSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Typer
Datasheet

Specifications of 74HCT573DB,118

Logic Type
D-Type Transparent Latch
Package / Case
20-SSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
17ns
Current - Output High, Low
6mA, 6mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
HCT
Polarity
Non-Inverting
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
17 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
CMOS
Package Type
SSOP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HCT573DB-T
74HCT573DB-T
935186980118
Philips Semiconductors
3. Quick reference data
4. Ordering information
Table 2:
74HC_HCT573_3
Product data sheet
Type number
74HC573
74HC573N
74HC573D
74HC573DB
74HC573PW
74HC573BQ
Ordering information
Package
Temperature range Name
Table 1:
GND = 0 V; T
[1]
Symbol Parameter
74HC573
t
t
C
C
74HCT573
t
t
C
C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
PHL,
PLH
PHL,
PLH
i
PD
i
PD
C
P
f
f
C
V
N = number of inputs switching;
i
o
D
CC
PD
= input frequency in MHz;
L
(C
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
propagation delay
input capacitance
power dissipation
capacitance
propagation delay
input capacitance
power dissipation
capacitance
PD
V
Quick reference data
CC
Dn to Qn
LE to Qn
Dn to Qn
LE to Qn
amb
2
V
CC
= 25 C; t
f
o
2
) = sum of outputs.
f
DIP20
SO20
SSOP20
TSSOP20
DHVQFN20 plastic dual in-line compatible thermal enhanced
i
Rev. 03 — 17 January 2006
N + (C
r
= t
f
= 6 ns
L
Conditions
V
per latch;
V
V
per latch;
V
CC
I
CC
I
V
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic small outline package; 20 leads;
body width 5.3 mm
plastic small outline package; 20 leads;
body width 4.4 mm
very thin quad flat package; no leads;
20 terminals; body 2.5
= GND to V
= GND to (V
CC
= 5 V; C
= 5 V; C
2
f
o
) where:
L
L
CC
= 15 pF
= 15 pF
CC
74HC573; 74HCT573
1.5 V)
Octal D-type transparent latch; 3-state
D
in W).
4.5
[1]
[1]
Min
-
-
-
-
-
-
-
-
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
0.85 mm
Typ
14
15
3.5
26
17
15
3.5
26
Max
-
-
-
-
-
-
-
-
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1
SOT764-1
Unit
ns
ns
pF
pF
ns
ns
pF
pF
2 of 26

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