74LVT573PW,118 NXP Semiconductors, 74LVT573PW,118 Datasheet - Page 11

IC OCTAL D TRANSP LATCH 20TSSOP

74LVT573PW,118

Manufacturer Part Number
74LVT573PW,118
Description
IC OCTAL D TRANSP LATCH 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Type
D-Typer
Datasheet

Specifications of 74LVT573PW,118

Logic Type
D-Type Transparent Latch
Package / Case
20-TSSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
6.3ns
Current - Output High, Low
32mA, 64mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
LVT
Polarity
Non-Inverting
Input Bias Current (max)
3000 uA
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.7 ns at 3.3 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
BiCMOS
Package Type
TSSOP
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVT573PW-T
74LVT573PW-T
935176360118
NXP Semiconductors
Fig 13. Package outline SOT339-1 (SSOP20)
74LVT573_4
Product data sheet
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT339-1
max.
A
2
0.21
0.05
A
20
1
1
Z
pin 1 index
y
1.80
1.65
A
2
IEC
0.25
A
e
3
D
0.38
0.25
b
p
0.20
0.09
MO-150
JEDEC
c
b
p
Rev. 04 — 15 September 2008
REFERENCES
D
7.4
7.0
0
(1)
11
10
w
M
E
5.4
5.2
(1)
JEITA
scale
c
0.65
2.5
e
H
7.9
7.6
A
E
2
3.3 V octal D-type transparent latch; (3-state)
A
1
5 mm
1.25
L
1.03
0.63
L
H
p
E
E
detail X
0.9
0.7
Q
L
L
p
PROJECTION
Q
EUROPEAN
0.2
v
(A )
3
0.13
A
w
A
74LVT573
0.1
© NXP B.V. 2008. All rights reserved.
y
X
v
ISSUE DATE
M
99-12-27
03-02-19
A
Z
0.9
0.5
(1)
SOT339-1
8
0
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o
o

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