74LVT573PW,118 NXP Semiconductors, 74LVT573PW,118 Datasheet - Page 9

• Manufacturer Part Number: 74LVT573PW,118
• Description: IC OCTAL D TRANSP LATCH 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVTr
• Type: D-Typer

Specifications of 74LVT573PW,118

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-TSSOP
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2.7 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 6.3ns
• Current - Output High, Low: 32mA, 64mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: LVT
• Polarity: Non-Inverting
• Input Bias Current (max): 3000 uA
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.7 ns at 3.3 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Bits: 8
• Number Of Elements: 1
• Latch Mode: Transparent
• Technology: BiCMOS
• Package Type: TSSOP
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVT573PW-T; 74LVT573PW-T; 935176360118

NXP Semiconductors
Table 9.
74LVT573_4
Product data sheet
Input
V
2.7 V
Fig 11. Test circuitry for switching times
I
Test data is given in
Definitions test circuit:
R
C
R
V
EXT
L
L
T
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
f
i
= Test voltage for switching times.
10 MHz
t
500 ns
Table
W
9.
negative
positive
pulse
pulse
GENERATOR
0 V
0 V
V
V
I
I
PULSE
t
r
, t
2.5 ns
90 %
10 %
f
Rev. 04 — 15 September 2008
t
t
f
r
V
V
M
M
V
10 %
90 %
I
Load
C
50 pF
L
R T
V
DUT
t
t
W
W
CC
R
500
o
3.3 V octal D-type transparent latch; (3-state)
L
of the pulse generator.
V
O
V
V
M
M
t
t
r
f
C L
001aae235
V
V
t
GND
PHZ
EXT
EXT
R L
R L
, t
PZH
t
6 V
PLZ
, t
74LVT573
PZL
© NXP B.V. 2008. All rights reserved.
t
open
PLH
, t
PHL
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