74AHCT259PW,112 NXP Semiconductors, 74AHCT259PW,112 Datasheet - Page 4
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74AHCT259PW,112
Manufacturer Part Number
74AHCT259PW,112
Description
IC 8BIT ADDRESSBL LATCH 16-TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCTr
Datasheet
1.74AHC259D112.pdf
(17 pages)
Specifications of 74AHCT259PW,112
Logic Type
D-Type, Addressable
Package / Case
16-TSSOP
Circuit
1:8
Output Type
Standard
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
4.1ns
Current - Output High, Low
8mA, 8mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
AHCT
Polarity
Non-Inverting
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Propagation Delay Time
4.1 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2516-5
935265472112
935265472112
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
74AHC_AHCT259_2
Product data sheet
Symbol
Q6
Q7
D
LE
MR
V
Operating mode
Reset (clear)
Demultiplexer
(active HIGH 8-channel)
decoder (when D = H)
Memory (no action)
Addressable latch
CC
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
d = HIGH or LOW data one set-up time prior to the LOW-to-HIGH LE transition;
q = lower case letter indicates the state of the referenced input one set-up time prior to the LOW-to-HIGH transition.
Pin description
Function table
Pin
11
12
13
14
15
16
Input
MR
L
L
H
H
[1]
…continued
LE
H
L
H
L
Description
latch output
latch output
data input
latch enable input (active LOW)
conditional reset input (active LOW)
supply voltage
D
X
d
d
d
d
d
d
d
d
X
d
d
d
d
d
d
d
H
A0
X
L
H
L
H
L
H
L
H
X
L
H
L
H
L
H
L
H
Rev. 02 — 15 May 2008
A1
X
L
L
H
H
L
L
H
H
X
L
L
H
H
L
L
H
H
A2
X
L
L
L
L
H
H
H
H
X
L
L
L
L
H
H
H
H
Output
Q0
L
Q = d L
L
L
L
L
L
L
L
q
Q = d q
q
q
q
q
q
q
q
0
0
0
0
0
0
0
0
74AHC259; 74AHCT259
Q1
L
Q = d L
L
L
L
L
L
L
q
Q = d q
q
q
q
q
q
q
1
1
1
1
1
1
1
1
Q2
L
L
Q = d L
L
L
L
L
L
q
q
Q = d q
q
q
q
q
q
2
2
2
2
2
2
2
2
Q3
L
L
L
Q = d L
L
L
L
L
q
q
q
Q = d q
q
q
q
q
3
3
3
3
3
3
3
3
Q4
L
L
L
L
Q = d L
L
L
L
q
q
q
q
Q = d q
q
q
q
4
4
4
4
4
4
4
4
8-bit addressable latch
Q5
L
L
L
L
L
Q = d L
L
L
q
q
q
q
q
Q = d q
q
q
5
5
5
5
5
5
5
5
© NXP B.V. 2008. All rights reserved.
Q6
L
L
L
L
L
L
Q = d L
L
q
q
q
q
q
q
Q = d q
q
6
6
6
6
6
6
6
6
Q7
L
L
L
L
L
L
L
Q = d
q
q
q
q
q
q
q
Q = d
4 of 17
7
7
7
7
7
7
7
7