74HCT164PW,112 NXP Semiconductors, 74HCT164PW,112 Datasheet - Page 4

IC SHIFT REG 8BIT SI-PO 14TSSOP

74HCT164PW,112

Manufacturer Part Number
74HCT164PW,112
Description
IC SHIFT REG 8BIT SI-PO 14TSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT164PW,112

Logic Type
Shift Register
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Serial to Parallel
Voltage - Supply
4.5 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HCT164PW
74HCT164PW
935188330112
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
74HC_HCT164
Product data sheet
Symbol
DSA
DSB
Q0 to Q7
GND
CP
MR
V
Operating
modes
Reset (clear)
Shift
Symbol
V
I
I
I
I
I
T
IK
OK
O
CC
GND
stg
CC
CC
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition
 = LOW-to-HIGH clock transition
Pin description
Function table
Limiting values
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
5.2 Pin description
Input
MR
L
H
H
H
H
3, 4, 5, 6, 10, 11, 12, 13
7
[1]
Pin
1
2
8
9
14
CP
X
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 25 November 2010
Conditions
V
V
0.5 V < V
I
O
< 0.5 V or V
DSA
X
l
l
h
h
< 0.5 V or V
O
< V
I
CC
O
> V
> V
+ 0.5 V
CC
DSB
X
l
h
l
h
Description
data input
data input
output
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
master reset input (active LOW)
positive supply voltage
CC
+ 0.5 V
+ 0.5 V
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
Output
Q0
L
L
L
L
H
[1]
[1]
Min
0.5
-
-
-
-
50
65
© NXP B.V. 2010. All rights reserved.
Q1 to Q7
L to L
q0 to q6
q0 to q6
q0 to q6
q0 to q6
Max
+7
20
20
25
50
-
+150
Unit
V
mA
mA
mA
mA
mA
C
4 of 20

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