74LVC595ABQ,115 NXP Semiconductors, 74LVC595ABQ,115 Datasheet - Page 9

IC 8BIT SHIFT REGISTER 16HVQFN

74LVC595ABQ,115

Manufacturer Part Number
74LVC595ABQ,115
Description
IC 8BIT SHIFT REGISTER 16HVQFN
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
Not Requiredr
Datasheet

Specifications of 74LVC595ABQ,115

Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Logic Type
Shift Register
Output Type
Standard
Function
Serial to Parallel
Number Of Elements
1
Number Of Bits Per Element
8
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Counting Sequence
Serial to Serial/Parallel
Number Of Circuits
1
Logic Family
LVC
Propagation Delay Time
4.7 ns, 4 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Technology
CMOS
Number Of Elements
1
Number Of Bits
8
Logical Function
Shift Register
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Temp Range
-40C to 125C
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC595ABQ-G
74LVC595ABQ-G
935282468115
NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
[4]
[5]
[6]
74LVC595A_1
Product data sheet
Symbol Parameter
t
t
f
t
C
h
rec
max
sk(o)
PD
Typical values are measured at T
t
t
t
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
C
P
f
f
C
V
N = number of inputs switching;
pd
en
dis
i
o
D
CC
PD
= input frequency in MHz;
L
(C
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
hold time
recovery time
maximum
frequency
output skew time
power dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of outputs.
PLH
PZH
f
PHZ
i
N + (C
and t
and t
and t
PHL
PZL
PLZ
Conditions
DS to SHCP; see
MR to SHCP; see
SHCP or STCP; see
and
V
V
CC
I
L
.
.
.
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= GND to V
amb
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
Figure 8
V
= 3.0 V to 3.6 V
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 25 C and V
…continued
2
f
o
) where:
CC
Figure 9
Figure 11
CC
Rev. 01 — 29 May 2007
Figure 7
= 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
8-bit serial-in/serial-out or parallel-out shift register; 3-state
D
in W).
[5]
[6]
Figure
Min
100
110
130
1.5
1.5
1.5
1.0
5.0
4.0
2.0
2.0
80
-
-
-
-
40 C to +85 C
13.
Typ
130
140
150
180
0.2
0.1
50
45
44
0.1
0.2
2.7
1.5
1.0
1.0
-
[1]
Max
1.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
74LVC595A
40 C to +125 C
Min
100
115
2.0
2.0
2.0
1.5
5.5
4.5
2.5
2.5
70
90
-
-
-
-
© NXP B.V. 2007. All rights reserved.
Max
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9 of 19
Unit
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
ns
pF
pF
pF

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