BU4021B Rohm Semiconductor, BU4021B Datasheet - Page 15

• Manufacturer Part Number: BU4021B
• Description: IC SHIFT REGISTER 8BIT 16DIP
• Manufacturer: Rohm Semiconductor
• Series: 4000Br

Specifications of BU4021B

• Logic Type: Shift Register
• Output Type: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Function: Parallel or Serial to Serial
• Voltage - Supply: 3 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

●Description of BU4028B series model
●Notes for use
© 2009 ROHM Co., Ltd. All rights reserved.
BU4015B,BU4015BF,BU4021B,BU4021BF,
BU4094BC,BU4094BCF,BU4094BCFV,BU4538B,BU4028B
www.rohm.com
D
VSS
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
Function: BCD to decimal decoder
1) Description of operation
PIN arrangement
Truth table
1. Absolute maximum ratings
2. Connecting the power supply connector backward
3. Power supply lines
4. GND voltage
5. Thermal design
6. Inter-pin shorts and mounting errors
7. Actions in strong electromagnetic field
8. Testing on application boards
9. Ground Wiring Pattern
10. Unused input terminals
Q4
Q2
Q0
Q7
Q9
Q5
Q6
BU4028B is a decoder to convert BCD signals into decimal signals. Out of 10 outputs of Q0~Q9, output applicable for the
input code of A~D becomes “H” level and all other outputs become “L” level. When the input of D is made to be inhibit input
by using 3 inputs of A~C, this product can be used as a 1-OF-8 decoder.
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, not that capacitance characteristic values are reduced at low temperatures.
The potential of GND pin must be minimum potential in all operating conditions.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring pattern of any external components, either.
Connect all unused input terminals to VDD or VSS in order to prevent excessive current or oscillation
Insertion of a resistor (100kΩ approx.) is also recommended
INPUT
C
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
1
2
3
4
5
6
7
8
B
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Q2
Q0
Q7
Q9
Q5
Q6
Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
Q4
Q8
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
Q3
Q1
B
C
D
A
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
OUTPUT
16
15
14
13
12
11
10
9
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
VDD
Q3
Q1
B
C
D
A
Q8
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
IN
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
A
B
C
D
Block diagram
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Switching characteristics
Input wave
Output wave
Neg.
Pos.
10%
tPHL
20[ns]
50%
tTLH
90%
15/17
50%
90%
10%
20[ns]
tTHL
tPLH
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
PIN description
PIN
No.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Symb
VDD
VSS
Q4
Q2
Q0
Q7
Q9
Q5
Q6
Q8
Q1
Q3
ol
A
D
C
B
―
―
O
O
O
O
O
O
O
O
O
O
O
I/
I
I
I
I
Technical Note
2009.06 - Rev.A
Power supply (+)
Power supply(-)
Function
Output 4
Output 2
Output 0
Output 7
Output 9
Output 5
Output 6
Output 8
Output 1
Output 3
Input D
Input C
Input A
Input B