92HD65C IDT [Integrated Device Technology], 92HD65C Datasheet - Page 33

• Manufacturer Part Number: 92HD65C
• Description: SIX CHANNEL HD AUDIO CODECS
• Manufacturer: IDT [Integrated Device Technology]

92HD65C
SIX CHANNEL HD AUDIO CODEC WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
IDT CONFIDENTIAL
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
2.24. HD Audio ECR 15b support
2.25. Digital Core Voltage Regulator
1. Default at power-on is SPDIF_OUT/DMIC1 for pin 48 (40) and SPDIF_OUT/DMIC1 for pin
2. If GPIO is enabled for that pin, it overrides the SPDIF_OUT and DMIC functions for that pin.
3. If the GPIO function is not enabled for that pin, then the DMIC or SPDIF_OUT function may be
The codec implements complete support for the HDA015-B specification building on the support
already present in previous products. HDA015-B features supported are:
1. Persistence of many configuration options through bus and function group reset.
2. The ability to support port presence detect in D3 even when the HD Audio bus is in a low power
3. Fast resume times from low power states: 1ms D1 to D0, 2ms D2 to D0, 10mS D3 to D0.
4. Notification if persistent register settings have been unexpectedly reset.
5. SPDIF Out active in D3 (required)
6. The ability to notify the driver that a clock is necessary so entering D3 with the clock stopped is
The digital core operates from 1.8V (+/- 10%). Many systems require that the CODEC use a single
3.3V digital supply, so an integrated regulator is included on die. The regulator uses pin 9, DVDD, as
its voltage source. The output of the LDO is connected to pin 1 and the digital core. A 10uF capacitor
must be placed on pin 1 for proper load regulation and regulator stability.
Enable
0
1
Enable
0
1
GPIO3
GPIO0
Note: If the pin selected for DMIC1 input is configured as an output or GPIO, the DMIC block will
behave as if silence is present at the input.
46(38)
enabled by setting the pin input or output enable to 1, respectively. (Setting input and output
enable to 1 at the same time will only enable DMIC)
state (no clock.)
not permissible
0
0
1
NA
0
0
1
NA
Dig0Pin Input
Dig1Pin Input
Enable
Enable
Table 18. Dig0Pin (Pin 48/40) Function Selection
Table 19. Dig1Pin (Pin 46/38) Function Selection
Dig0Pin Output
0
1
NA
NA
Dig1Pin Output
0
1
NA
NA
Enable
Enable
33
NA
NA
No
Yes
NA
NA
NA
No
Yes
NA
DMIC1Vol (NID
DMIC1Vol (NID
Selected by
Selected by
0x12)
0x12)
Unused (input)
SPDIF0 output
Unused (input)
DMIC1 input
GPIO3
Unused (input)
SPDIF1 output
Unused (input)
DMIC1 input
GPIO0
Function
Function
V 0.91 10/11
92HD65C