ZL50012/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50012/GDC Datasheet - Page 44
![no-image](/images/no-image-200.jpg)
ZL50012/GDC
Manufacturer Part Number
ZL50012/GDC
Description
Flexible 512-ch Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50012GDC.pdf
(65 pages)
- Current page: 44 of 65
- Download datasheet (2Mb)
Note: # denotes input stream from 0 to 7
External Read/Write Address: 200
Reset Value: 0000
15 - 7
SOCR0
SOCR1
SOCR2
SOCR3
SOCR4
SOCR5
SOCR6
SOCR7
5 - 3
2 - 0
Bit
6
15
0
0
0
0
0
0
0
0
STOHZ#A2 - 0
STO#DR2 - 0
H
STOHZ#AC
14
Unused
0
0
0
0
0
0
0
0
Table 24 - Stream Output Control Register 0 to 7 (SOCR0 to SOCR7)
Name
13
0
0
0
0
0
0
0
0
H
,
202
12
0
0
0
0
0
0
0
0
H
Reserved. In normal functional mode, these bits MUST be set to zero.
STOHZ Advancement Control. When this bit is low, the advancement unit is
15.2ns. When this bit is high, the advancement unit is 1/4 bit.
STOHZ Additional Advancement Bits
Output Data Rate Selection Bits:
,
204
11
0
0
0
0
0
0
0
0
H
,
10
STOHZ#A2-0
0
0
0
0
0
0
0
0
206
101-111
H
Zarlink Semiconductor Inc.
000
001
010
011
100
,
9
0
0
0
0
0
0
0
0
208
ZL50012
H
,
STO#DR2-0
8
0
0
0
0
0
0
0
0
20A
47
100 - 111
000
001
010
H
011
Additional Advancement
,
7
0
0
0
0
0
0
0
0
(STOHZ#AC = 0)
20C
Reserved
15.2 ns
30.5 ns
61.0 ns
H
45.7 ns
0.0 ns
STOHZ0
STOHZ1
STOHZ2
STOHZ3
STOHZ4
STOHZ5
STOHZ6
STOHZ7
,
Description
AC
AC
AC
AC
AC
AC
AC
AC
6
20E
H
STOHZ driven high
Output Data Rate
,
STOHZ0
STOHZ1
STOHZ2
STOHZ3
STOHZ4
STOHZ5
STOHZ6
STOHZ7
:
A2
A2
A2
A2
A2
A2
A2
A2
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
5
Reserved
STo HiZ
STOHZ0
STOHZ1
STOHZ2
STOHZ3
STOHZ4
STOHZ5
STOHZ6
STOHZ7
A1
A1
A1
A1
A1
A1
A1
A1
4
Additional Advancement
(STOHZ#AC = 1)
STOHZ0
STOHZ1
STOHZ2
STOHZ3
STOHZ4
STOHZ5
STOHZ6
STOHZ7
A0
A0
A0
A0
A0
A0
A0
A0
Reserved
3
1/4 bit
1/2 bit
3/4 bit
4/4 bit
0 bit
STO0
STO1
STO2
STO3
STO4
STO5
STO6
STO7
DR2
DR2
DR2
DR2
DR2
DR2
DR2
DR2
2
Data Sheet
STO0
STO1
STO2
STO3
STO4
STO5
STO6
STO7
DR1
DR1
DR1
DR1
DR1
DR1
DR1
DR1
1
STO0
STO1
STO2
STO3
STO4
STO5
STO6
STO7
DR0
DR0
DR0
DR0
DR0
DR0
DR0
DR0
0
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