ZL50073GAG2 ZARLINK [Zarlink Semiconductor Inc], ZL50073GAG2 Datasheet - Page 34

• Manufacturer Part Number: ZL50073GAG2
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 128 Inputs and 128 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The mapping of each output stream, SToAn, SToBn, SToCn and SToDn, depends on the programmed bit rate. The
address offset range for each stream is illustrated in Table 14.
The address range for a particular stream is given by adding the group start address, as indicated in Table 13, to
the appropriate stream offset range, as indicated in Table 14. For example, the Connection Memory address range
for SToB12 operating at 32 Mbps is 00C800-00CFFF; the Connection Memory address range for SToC4 operating
at 8 Mbps is 004400-0045FF.
Each output channel timeslot occupies a range of 4 addresses in the Connection Memories. The timeslot address
offset is illustrated in Table 15. It shows the maximum number of timeslots that a stream can have, but the actual
number of timeslots available depends on the output data rates, as illustrated in Table 1 and Table 14.
Output Group Data Rate
65 Mbps
32 Mbps
16 Mbps
8 Mbps
Table 14 - Connection Memory Stream Address Offset at Various Output Rates
Table 15 - Connection Memory Timeslot Address Offset Range
SToAn
126
127
128
129
254
255
0
1
2
-
-
Timeslot Range
0 - 1023
0 - 255
0 - 127
0 - 511
N/A
SToBn
126
127
128
129
254
255
0
1
2
-
-
Timeslot
Zarlink Semiconductor Inc.
SToCn
ZL50073
126
127
128
129
254
255
0
1
2
Output Stream
-
-
SToBn, Cn, Dn
34
SToCn, Dn
SToAn
SToAn
SToBn
SToAn
SToBn
SToCn
SToAn
SToBn
SToCn
BERR
SToDn
SToDn
SToDn
126
127
128
129
254
255
0
1
2
-
-
Offset hex
Stream Address Offset Range (Hex)
Address
1FC
3FC
000
004
008
1F8
200
204
3F8
-
-
00C00 - 00FFF
00000 - 00FFF
00800 - 00FFF
00800 - 00BFF
00800 - 00FFF
00000 - 007FF
00000 - 003FF
00400 - 007FF
00000 - 001FF
00200 - 003FF
00400 - 005FF
00600 - 007FF
N/A
N/A
Data Sheet