ZL50408GDC ZARLINK [Zarlink Semiconductor Inc], ZL50408GDC Datasheet - Page 26

• Manufacturer Part Number: ZL50408GDC
• Description: Managed 8-Port 10/100M 1-Port 10/100/1000M Ethernet Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

3.1
3.1.1
The ZL50408 has many programmable parameters, covering such functions as QoS weights, VLAN control, and
port mirroring setup. In managed mode, the CPU interface provides an easy way of configuring these parameters.
The parameters are contained in 8-bit configuration registers. The device allows indirect access to these registers,
as follows:
•
•
•
If operating in 8-bit interface mode, two “index” registers (addresses 000b and 001b) need to be written, to
indicate the desired 16-bit register address. In 16-bit mode, only one register (address 000b) needs to be
written for the desired 16-bit register address.
In serial mode, the address, command and data are shifted in serially. To access the configuration registers,
only one “index” register (addresses 000b) needs to be written with the configuration register address. The
desired data can be written into or read from the “data” register (address 010b).
•
To indirectly configure the register addressed by the index register(s), a “data” register (address 010b) must
be written with the desired 8-bit data.
•
Register Configuration, Frame Transmission, and Frame Reception
For example, if “XX” is required to be written to register “YY”, a write of “YY” is required to write to
address “000b” (Index register). Then, a write of “XX” is required to write to address “010b” (Data
Register). This completes the register write and register “YY” will contain the value of “XX”.
The ZL50408 supports special register-write in serial and 16-bit mode. This allows CPU to write to two
consecutive configuration registers in a single write operation. By writing to bit[14] of configuration
Register Configuration
CPU frame
Receive
8/16-bit Data Bus
FIFO
CPU frame
Transmit
FIFO
Tclk
MII Interface
Txd Txen
Index Reg 1
(Addr = 1)
16-bit Address
Rxd Rxdv
Figure 5 - Overview of the SSI+MII Interface
Index Reg 0
Rclk
(Addr = 0)
Processor
Zarlink Semiconductor Inc.
8-bit Data Bus
3-bit Address Bus
Address
Config Data
(Addr = 2)
Registers
ZL50408
Inderect
Internal
Access
Serial Out
Synchronous Serial Interface
Reg
26
Serial In
16-bit Data Bus
Status Reg
Command/
(Addr = 4)
Strobe
I/O Data MUX
Interrupt
INT CS W R
Interrupt
(Addr = 5)
Interrupt
Reg
8/16-bit Data Bus
Command 1
Receive
Control
FIFO
Command 1 Reg
(Addr = 6)
Control
Command 1
Transmit
Control
FIFO
Command 2
Command 2
Data Sheet
(Addr = 7)
Transmit
Control
Control
FIFO
Reg