S71PL-N SPANSION [SPANSION], S71PL-N Datasheet

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S71PL-N

Manufacturer Part Number
S71PL-N
Description
MirrorBit MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
S71PL-N MirrorBit
S71PL256N, S71PL127N, S71PL129N
256/128/128 Megabit (16/8/8 M x 16-Bit)
CMOS 3.0 Volt-only Simultaneous Read/Write,
Page Mode Flash Memory
Data Sheet
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See
Publication Number S71PL-N_00
TM
Notice On Data Sheet Designations
MCPs
Revision A
Amendment 9
for definitions.
Issue Date December 8, 2006
S71PL-N MirrorBit
TM
MCPs Cover Sheet

Related parts for S71PL-N

S71PL-N Summary of contents

Page 1

... Page Mode Flash Memory Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Publication Number S71PL-N_00 TM MCPs Notice On Data Sheet Designations Revision A ...

Page 2

... Questions regarding these document designations may be directed to your local sales office range. Changes may also include those needed to clarify S71PL-N MirrorBit MCPs S71PL-N_00_A9 December 8, 2006 ...

Page 3

... Fine-Pitch Ball Grid Array (FBGA) S71PL256NC0 S71PL256ND0 – 64 Ball Fine-Pitch Ball Grid Array (FBGA) S71PL129NB0 General Description This document contains information for the S71PL-N MirrorBit MCP product. For detailed specifications, please refer to the individual data sheets: Publication Number S71PL-N_00 TM MCPs S71PL129NC0 ...

Page 4

... S71PL-N MirrorBit MCPs pSRAM Density 64 Mb 128 Mb S71PL127NC0 S71PL129NC0 S71PL256NC0 S71PL256ND0 pSRAM Type pSRAM Type 2 pSRAM Type 7 pSRAM Type 8 pSRAM Type 2 pSRAM Type 8 pSRAM Type 2 pSRAM Type 7 pSRAM Type 8 pSRAM Type 2 pSRAM Type 8 pSRAM Type 2 pSRAM Type 8 pSRAM Type 2 S71PL-N_00_A9 December 8, 2006 ...

Page 5

... Type 0 is standard. Specify other options as required. 2. BGA package marking omits leading “S” and packing type designator from ordering part number. 3. Contact factory for availability for any of the OPNs listed since RAM type availability may vary over time. December 8, 2006 S71PL-N_00_A9 ...

Page 6

... OE# WE# CE#s UB#s LB#s CE2 Notes: 1. RY/BY open drain output A23 (PL256N), A22 (PL127N), A21 (PL129N). MAX Flash CCS V CC pSRAM/SRAM IO - CE# UB# LB# TM S71PL-N MirrorBit MCPs RY/BY S71PL-N_00_A9 December 8, 2006 ...

Page 7

... Physical Dimensions/Connection Diagrams This section shows the I/O designations and package specifications for the S71PL-N. 5.1 Special Handling Instructions for FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150° ...

Page 8

... WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. N/A MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3439 \ 16-038.22 \ 01.04.05 S71PL-N_00_A9 December 8, 2006 7 E1 ...

Page 9

... Ø b 0.35 0.40 eE 0.80 BSC. eD 0.80 BSC 0.40 BSC. A2,A3,A4,A5,A6,A7,A8,A9 B1,B10,C1,C10,D1,D10, E1,E10,F1,F10,G1,G10, H1,H10,J1,J10,K1,K10,L1,L10, M2,M3,M4,M5,M6,M7,M8,M9 December 8, 2006 S71PL-N_00_A9 Figure 5.3 TLA084 Physical Dimensions TOP VIEW 0.15 C (2X) 0.20 C 0.08 C SIDE VIEW MAX NOTE 1 ...

Page 10

... Legend A11 D8 D9 Shared A12 A15 E8 E9 A13 A21 Flash Only F8 F9 A14 A22 pSRAM Only G8 G9 RFU A16 Do Not Use/ Reserved for Future Use H8 H9 DQ15 RFU J8 J9 DQ7 DQ14 M10 DNU Shared Addresses A20:A0 A21:A0 S71PL-N_00_A9 December 8, 2006 ...

Page 11

... F-CE1# J2 R-CE1# M1 DNU Note: Top view—balls facing down. The addresses that are shared vary by MCP combination as shown in the table below: S71PL129NB0 S71PL129NC0 December 8, 2006 S71PL-N_00_A9 Figure 5.5 64-ball Fine-Pitch Ball Grid Array (S71PL129N RFU RFU C3 C4 ...

Page 12

... OUTER ROW 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. S71PL-N_00_A9 December 8, 2006 7 E1 3352 \ 16-038.22a ...

Page 13

... Revision A8 (October 6, 2006) Global Added 32 Mb pSRAM Type 8 to the valid combinations Revision A9 (December 8, 2006) Global Added 64 Mb pSRAM Type 8 to the valid combinations. December 8, 2006 S71PL-N_00_A9 Description speed from 30 µ µs VCS Max µA ...

Page 14

... Copyright © 2005-2006 Spansion Inc. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion Inc. Other names are for informational purposes only and may be trademarks of their respective owners S71PL-N MirrorBit MCPs S71PL-N_00_A9 December 8, 2006 ...

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