HI-1575 HOLTIC [Holt Integrated Circuits], HI-1575 Datasheet
HI-1575
Related parts for HI-1575
HI-1575 Summary of contents
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... February 2006 DESCRIPTION The HI-1575 is a low power CMOS dual transceiver with on-chip Manchester II Encoder and dual Decoder designed to meet the requirements of the MIL-STD-1553 specification. The part acts as a "Smart Transceiver", allowing users to transmit and receive properly encoded MIL-STD-1553 Command and Data words between a 16-bit host processor and dual MIL-STD-1553 data buses ...
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... Manchester II encoder and the decoder's receiver sampling logic. STATUS & MODE REGISTER The HI-1575 is configured by writing bits the Sta- tus & Mode (SAM) register. Refer to figure 2 for a com- plete description. SAM bits are read/write allowing the user to verify the chip's configuration at any time by reading the SAM ...
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... TX write. SAM bit 15 (SENDDATA) is high during this period and may be used as a flag to indicate when the HI-1575 is ready to accept the next data write for contiguous transmission. When transmitting a message of three or more words, the third and subsequent write operations should occur every 20 ...
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... MIL-STD-1553 bus A. The received word may be read by the host from the RXA register. RCVA is reset on reading RXA or if the HI-1575 detects a new word arriving on bus A. If the data words are contiguous, then RCVA will be high for about 3 us before the new word resets it ...
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... P FIGURE 4. EXAMPLE RECEIVE OPERATION /CHB REG Register 0 Receiver A Data (RXA) 0 Receiver B Data (RXB) 1 Status & Mode Register (SAM) FIGURE 5. HI-1575 REGISTER MAP HOLT INTEGRATED CIRCUITS 5 TXDATA VALID SYNC SYNC 15 Read RXA or RXB, (MIL-STD-1553 Data word) SYNC SYNC ...
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... The host reads the received word from the HI-1575 RXA or RXB register. The data word is read by pulsing while high and REG is low. Figure 4 shows an example receive operation. The SYNC output indicates whether the word had a Command Sync (SYNC=1) or Data Sync (SYNC=0). SAM register bits 8 and 12 (RSYNCA and RSYNCB) retain the Sync values for the last word received on each bus ...
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... DATA SYNC ONE ZERO FIGURE 8. MIL-STD-1553 BUS RECEIVER TIMING MID-SYNC MID-PARITY DATA (Read RXA) (Read RXA) FIGURE 9. HI-1575 RECEIVER TIMING REG t RWH STRB t DWH D15:0 SYNC t CHWH CHA/CHB t RWWH R/W HOLT INTEGRATED CIRCUITS 7 BIT PERIOD ...
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... TRANSMITTER(Measured at Point “A ” in Figure 12 unless otherwise specified) D Output Voltage Direct coupled Transformer coupled Output Noise Output Dynamic Offset Voltage Direct coupled Transformer coupled Output resistance HI-1575 RECOMMENDED OPERATING CONDITIONS Supply Voltage -0 VDD....................................... 3.3V... ±5% -0 +3.6 V +/- 10 Vp-p Temperature Range +1.0 A Industrial Screening.........-40°C to +85°C Hi-Temp Screening........-55° ...
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... Data Read to Databus Valid Data Read to Databus Tri-state CHA/ CHB Read Setup Time CHA/ CHB Read Hold Time R/ W Read Setup Time R/ W Read Hold Time HI-1575 TRANSMITTER 35 W Point “A “ D HI-1575 SYMBOL TEST CONDITIONS tr 35 ohm load tf 35 ohm load ...
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... FIGURE 13. TRANSFORMER COUPLED TEST CIRCUITS HEAT SINKING THE LEADLESS PLASTIC CHIP CARRIER PACKAGE The HI-1575PCI/T is packaged pin leadless plastic chip carrier (LPCC). This package has a metal heat sink pad on its bottom surface, which should be soldered to the printed circuit board for optimum thermal dissipation. ...
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... THERMAL CHARACTERISTICS Data taken at VDD = 3.3V, continuous data transmission at 1 Mbit/s, single transmitter enabled. PART NUMBER PACKAGE STYLE 32 pin PQFP HI-1575PQI / T 40 pin LPCC HI-1575PCI / T ORDERING INFORMATION HI - 1575 PART NUMBER PART NUMBER PART NUMBER HI-1575 q CONDITION Mounted on 59.5 circuit board ° Heat sink pad 27 ...
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... PIN PLASTIC THIN QUAD FLAT PACK (PQFP) .3543 BSC SQ. (9.00 BSC) See Detail A .063 MAX. (1.60 MAX.) 40-PIN PLASTIC CHIP-SCALE PACKAGE 6.00 ± .10 6.00 ± .10 See Detail A 0.90 ± .10 PACKAGE DIMENSIONS .00057 .00022 ± (0.0145 ± .0055) .2755 BSC SQ. (7.00 BSC) .0551 .002 ± (1.4 ± .05) .0031 R MIN. ...