PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 10
PC87332VLJ-5
Manufacturer Part Number
PC87332VLJ-5
Description
PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
Manufacturer
NSC [National Semiconductor]
Datasheet
1.PC87332VLJ-5.pdf
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DCD1 2
DENSEL
DENSEL
DIR
DIR
DR0 1
DR1
DRATE0 1
DRV2
Symbol
1 0 Pin Description
Normal
Mode
PPM
Mode
Normal
Mode
PPM
Mode
Normal
Mode
PPM
Mode
77 69
44 45
52 51
Pin
48
78
41
80
85
49
I O
O
O
O
O
O
O
O
I
I
Data Carrier Detect When low this signal indicates that the MODEM or data set has detected the
data carrier The DCD signal is a MODEM status input whose condition the CPU can test by reading bit
7 (DCD) of the MODEM Status Register (MSR) for the appropriate serial channel Bit 7 is the
complement of the DCD signal Bit 3 (DDCD) of the MSR indicates whether the DCD input has
changed state since the previous reading of the MSR
Note Whenever the DDCD bit of the MSR is set an interrupt is generated if MODEM Status interrupts are enabled
Density Select Indicates that a high FDC density data rate (500 kbps 1 Mbps or 2 Mbps) or a low
density data rate (250 kbps or 300 kbps) is selected DENSEL is active high for high density (5 25
drives) when IDENT is high and active low for high density (3 5 drives) when IDENT is low DENSEL
is also programmable via the Mode command (see Section 4 2 6)
Density Select This pin provides an additional Density Select signal in PPM Mode when PNF
(See AFD and Table 7-5 for further information )
Direction This output determines the direction of the floppy disk drive (FDD) head movement (active
e
Direction This pin provides an additional direction signal in PPM Mode when PNF
Table 7-5 for further information )
Drive SeIect 0 1 These are the decoded Drive Select outputs that are controlled by the Digital Output
Register bits D0 D1 The Drive Select outputs are gated with DOR bits 4– 7 These are active low
outputs They are encoded with information to control four FDDs when bit 4 of the Function Enable
Register (FER) is set (See MTR0 1 for more information ) DR0 exchanges logical drive values with
DR1 when bit 4 of Function Control Register (FCR) is set (See Table 7-5 for further information )
Drive Select 1 This pin provides an additional Drive Select signal in PPM Mode when PNF
drive select 1 when bit 4 of FCR is 0 It is drive select 0 when bit 4 of FCR is 1 This signal is active low
(See ACK and Table 7-5 for further information )
Data Rate 0 1 These outputs reflect the currently selected FDC data rate (bits 0 and 1 in the
Configuration Control Register (CCR) or the Data Rate Select Register (DSR) whichever was written
to last) The pins are totem-pole buffered outputs (6 mA sink 6 mA source)
Drive2 This input indicates whether a second floppy disk drive has been installed The state of this
pin is available from Status Register A in PS 2 mode (See PNF for further information )
step in inactive
(Continued)
e
step out) during a seek operation During reads or writes DIR is inactive
10
Function
e
0 (See INIT and
e
0 It is
e
0
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