PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 47

• Manufacturer Part Number: PC87332VLJ-5
• Description: PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
• Manufacturer: NSC [National Semiconductor]

4 0 FDC Command Set Description
3 The Ready Signal changed state during the polling mode
4 A Seek Relative Seek or Recalibrate command termi-
An interrupt due to reasons 1 or 2 does not require the
Sense Interrupt command and is cleared automatically This
type of interrupt occurs during normal command operations
and is easily discernible by the P via the MSR It is cleared
when reading or writing information from or to the Data Reg-
ister (FIFO)
An interrupt caused by reasons 3 or 4 is identified with the
aid of the Sense Interrupt command This type of interrupt is
cleared after the first result byte has been read Use bits 5
6 and 7 of ST0 to identify the cause of the interrupt as
shown in Table 4-14
Issuing a Sense Interrupt command without an interrupt
pending is treated as an Invalid command If the extended
track range mode is enabled a third byte should be read in
the Result Phase which will indicate the four most signifi-
cant bits of the present track number Otherwise only two
result bytes should be read
4 1 19 Set Track Command
This command is used to inspect or change the value of the
internal Present Track Register This can be useful for re-
covery from disk mistracking errors where the real current
track can be read through the Read ID command and then
the Set Track command can be used to set the internal
Present Track Register to the correct value
If the WNR bit is a 0 a track register is to be read In this
case the Result Phase byte contains the value in the inter-
nal register specified and the third byte in the Command
Phase is a dummy byte
If the WNR bit is a 1 data is written to a track register In this
case the third byte of the Command Phase is written to the
specified internal track register and the Result Phase byte
contains this new value
The DS1 and DS0 bits select the Present Track Register for
the particular drive The internal register address depends
on MSB DS1 and DS0 as shown in Table 4-15 This com-
mand does not generate an interrupt
for an internally selected drive (Occurs only after a hard-
ware or software reset )
nates
D7
TABLE 4-14 Status Register 0 Termination Codes
1
0
0
Interrupt
Status Register 0
Code
D6
1
0
1
Seek
End
D5
0
1
1
Internal Ready Went True
Normal Seek Termination
Abnormal Seek Termination
Cause
(Continued)
47
Command Phase
Execution Phase Internal register selected by MSB of DS1
or DS0 is read or written
Result Phase
4 1 20 Specify Command
The Specify command sets the initial values for three inter-
nal timers The parameters of this command are undefined
after power-up and are unaffected by any reset Thus soft-
ware should always issue a Specify command as part of an
initialization routine This command does not generate an
interrupt
Command Phase
Execution Phase Internal registers are written
Result Phase None
Step Rate Time These four bits define the time interval
between successive step pulses during a seek implied
seek recalibrate or relative seek The programming of this
step rate is shown in Table 4-16
Motor Off Time These four bits determine the simulated
Motor Off time as shown in Table 4-17
Motor On Time These seven bits determine the simulated
Motor On time as shown in Table 4-18
DMA This bit selects the data transfer mode in the Execu-
tion Phase of a read write or scan operation
Data Rate
0
1
0
0
500 kbps
300 kbps
250 kbps
0
DS1
1 Mbps
e
e
0
0
0
0
1
1
1
1
DMA mode is selected
Non-DMA mode is selected
Step Rate Time
TABLE 4-16 Step Rate Time (SRT) Values
TABLE 4-15 Set Track Register Address
WNR
0
0
DS0
0
0
1
1
0
0
1
1
(16
(16
(16
(16
0
Present Track Number (PTR)
1
1
Motor On Time
b
b
b
b
SRT) 2
SRT)
SRT)
SRT)
Value
0
1
MSB
0
0
1
0
1
0
1
0
1
Value
c
c
0
0
1 67
2
0
Register Addressed
MSB
0
Motor Off Time
0
1 67– 26 7
PTR0 (LSB)
PTR0 (MSB)
PTR1 (LSB)
PTR1 (MSB)
PTR2 (LSB)
PTR2 (MSB)
PTR3 (LSB)
PTR3 (MSB)
Range
0 5– 8
1– 16
2–32
DS1
1
0
DMA
Units
DS0
ms
ms
ms
ms
1
1