PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 33

• Manufacturer Part Number: PC87332VLJ-5
• Description: PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
• Manufacturer: NSC [National Semiconductor]

3 0 FDC Register Description
CCR Model 30 Mode
D7–3
D2
D1 –0
3 2 RESULT PHASE STATUS REGISTERS
The Result Phase of a command contains bytes that hold
status information The format of these bytes are described
below Do not confuse these status bytes with the Main
Status Register which is a read only register that is always
valid The Result Phase status registers are read from the
Data Register (FIFO) only during the Result Phase of certain
commands (see Section 4 1 Command Set Summary) The
status of each register bit is indicated when the bit is a 1
3 2 1 Status Register 0 (ST0)
D7–6
D5
D4
D3
D2
D1 –0
DESC
RESET
COND
DESC
RESET
COND
Reserved Should be set to 0
No Precompensation This bit can be set by soft-
ware to indicate no precompensation It can be
read by bit D2 of the DIR when in the Model 30
register mode This bit is unaffected by a software
reset
Data Rate Select 1 0 These bits determine the
data rate of the floppy controller See Table 3-7 for
the appropriate values
Interrupt Code
00
01
10
11
Seek End Seek Relative Seek or Recalibrate
command completed by the controller (Used during
a Sense Interrupt command )
Equipment Check After a Recalibrate command
Track 0 signal failed to occur (Used during Sense
Interrupt command )
Not Used Always 0
Head Select Indicates the active high status of the
HDSEL pin at the end of the Execution Phase
Drive Select 1 0 These two binary encoded bits
indicate the logical drive selected at the end of the
Execution Phase
00
01
10
11
N A
D7
0
D7
e
e
e
e
e
e
e
e
IC
0
N A
Normal Termination of Command
Abnormal Termination of Command Execu-
tion of command was started but was not
successfully completed
Invalid Command Issued Command issued
was not recognized as a valid command
Internal drive ready status changed state dur-
ing the drive polling mode Only occurs after a
hardware or software reset
Drive 0 selected
Drive 1 selected
Drive 2 selected
Drive 3 selected
D6
0
D6
IC
0
N A
D5
0
D5
SE
0
N A
D4
0
D4
EC
0
N A
D3
0
D3
NOPRE
0
0
N A
D2
HDS
D2
0
DRATE1
D1
1
DS1
D1
0
(Continued)
DRATE0
D0
DS0
0
D0
0
33
3 2 2 Status Register 1 (ST1)
D7
D6
D5
D4
D3
D2
D1
D0
3 2 3 Status Register 2 (ST2)
D7
D6
D5
D4
D3
DESC
RESET
COND
DESC
RESET
COND
End of Track Controller transferred the last byte of
the last sector without the Terminal Count (TC) pin
6 4 (PQFP TQFP) becoming active The last sector
is the End of Track sector number programmed in
the Command Phase
Not Used Always 0
CRC Error If this bit is set and bit 5 of ST2 is clear
then there was a CRC error in the Address Field of
the correct sector If bit 5 of ST2 is also set then
there was a CRC error in the Data Field
Overrun Controller was not serviced by the
soon enough during a data transfer in the Execution
Phase For read operations indicates a data over-
run For write operations indicates a data underrun
Not Used Always 0
No Data Three possible problems
1 Controller cannot find the sector specified in the
2 Controller cannot read any Address Fields with-
3 Controller cannot find starting sector during exe-
Not Writable Write Protect pin is active when a
Write or Format command is issued
Missing Address Mark If bit 0 of ST2 is clear then
the controller cannot detect any Address Field Ad-
dress Mark after two disk revolutions If bit 0 of ST2
is set then the controller cannot detect the Data
Field Address Mark after finding the correct Ad-
dress Field
Not Used Always 0
Control Mark Controller tried to read a sector
which contained a deleted data address mark dur-
ing execution of Read Data or Scan commands Or
if a Read Deleted Data command was executed a
regular address mark was detected
CRC Error in Data Field Controller detected a
CRC error in the Data Field Bit 5 of ST1 is also set
Wrong Track Only set if desired sector is not
found and the track number recorded on any sector
of the current track is different from the track ad-
dress specified in the Command Phase
Scan Equal Hit ‘‘Equal’’ condition satisfied during
any Scan command
Command Phase during the execution of a Read
Write Scan or Verify command An address
mark was found however so it is not a blank disk
out a CRC error during a Read ID command
cution of Read A Track command
D7
D7
ET
0
0
0
CM
D6
D6
0
0
0
CD
D5
CE
D5
0
0
WT
D4
OR
D4
0
0
SEH
D3
D3
0
0
0
ND
D2
SNS
0
D2
0
NW
D1
0
D1
BT
0
MA
MD
D0
D0
0
0
P