KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 4
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KFM2G16Q2M-DEB5
Manufacturer Part Number
KFM2G16Q2M-DEB5
Description
MuxOneNAND FLASH MEMORY
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.KFM2G16Q2M-DEB5.pdf
(124 pages)
- Current page: 4 of 124
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MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
Revision History
Revision No.
0.4
1.0
History
1. Corrected the errata
2. Updated DC parameters to RMS Values
3. Revised Warm Reset Timing Diagram
4. Added INT Capacitance Information
5. Added Speed Information Ordering Information
6. Added Booting Sequence in Technical Note
7. Revised OTP Program and Lock Flow Chart
8. Revised tOEZ description on Chapter 5.5
9. Revised tASO value to 10ns
10. Added RDY and INT Pin behavior before IOBE=1
11. Added Erase suspend and Resume Information for Multi Block Erase
12. Added I
1. Corrected the errata
2. Added Data Protection flow chart.
3. Removed Cache Read Operation.
4. Added additional information on command register.
5. Revised Interrupt status register information.
6. Added INT pin schematic.
7. Changed tPGM1 to 205 from 320us, tPGM2 to 220 from 350us.
8. Revised AC/DC parameters
9. Revised ECC Bypass Description
10. Revised Reset Parameters and Timing Diagrams.
LI
and I
LO
values for DDP on Chater 4.3
4
Draft Date
Feb. 28, 2005
May. 17, 2005
FLASH MEMORY
Remark
Preliminary
Final
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