EMC6D102_06 SMSC [SMSC Corporation], EMC6D102_06 Datasheet - Page 62

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EMC6D102_06

Manufacturer Part Number
EMC6D102_06
Description
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Revision 0.4 (06-15-06)
7.2.18
Register
Address
62h
63h
Read/
Write
R/W
R/W
Note: The range numbers will be used to calculate the slope of the PWM ramp up. For the fractional
Register 62h, 63h: Min/Off, PWM Ramp Rate Control
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Description of OFFx bits:
The OFFx Bits [7:5] specify whether the duty cycle will be set to 0% or the Minimum Fan Duty Cycle
when the measured temperature falls below the Temperature LIMIT register setting. OFF1 applies to
PWM1, OFF2 applies to PWM2, and OFF3 applies to PWM3.
OFF/MIN
Min/Off, PWM 1 Ramp Rate
PWM 2, PWM 3 Ramp Rate
0
1
entries, the PWM will go on full when the temp reaches the next integer value e.g., for 3.33,
PWM will be full on at (min. temp + 4).
Table 7.11 PWM output below Limit depending on value of Off/Min
Register Name
Control
Control
Table 7.10 Register Setting vs. Temperature Range
RAN[3:0]
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
At 0% duty below LIMIT
At Min PWM Duty below LIMIT
(MSb)
RR2E
OFF3
Bit 7
DATASHEET
RR2-2
OFF2
Bit 6
62
RR2-1
OFF1
Bit 5
RANGE (°C)
13.33
26.67
53.33
3.33
6.67
2.5
10
16
20
32
40
80
2
4
5
8
RR2-0
Bit 4
RES
PWM ACTION
RR1E
RR3E
Bit 3
RR1-2
RR3-2
Bit 2
RR1-1
RR3-1
Bit 1
SMSC EMC6D102
RR1-0
RR3-0
(LSb)
Bit 0
Datasheet
Default
Value
00h
00h

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