8S89834AKILF IDT [Integrated Device Technology], 8S89834AKILF Datasheet - Page 12

• Manufacturer Part Number: 8S89834AKILF
• Description: Low Skew, 2-to-4 LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer
• Manufacturer: IDT [Integrated Device Technology]

ICS8S89834I Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8S89834I.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8S89834I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 74.7°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
ICS8S89834AKI REVISION A FEBRUARY 4, 2010
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
85°C + 0.317W * 74.7°C/W = 108.7°C. This is well below the limit of 125°C.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 4 * 32mW = 128mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
= (3.63V, with all outputs switching) = 188.76mW + 128mW = 316.76mW
MAX
MAX
= V
= 32mW w/Loaded Output pair
CC_MAX
θ
JA
* I
for 16 Lead VFQFN, Forced Convection
EE_MAX
CC
= 3.63V, which gives worst case results.
JA
= 3.63V * 52mA = 188.76mW
* Pd_total + T
θ
JA
A
74.7°C/W
vs. Air Flow
12
0
LOW SKEW, 2-TO-4 LVCMOS/LVTTL-TO-LVPECL/ECL CLOCK MULTIPLEXER
65.3°C/W
JA
1
must be used. Assuming no air flow and
©2010 Integrated Device Technology, Inc.
58.5°C/W
2.5