H57V2562GFR-60C HYNIX [Hynix Semiconductor], H57V2562GFR-60C Datasheet - Page 18
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H57V2562GFR-60C
Manufacturer Part Number
H57V2562GFR-60C
Description
256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.H57V2562GFR-60C.pdf
(23 pages)
Precharging
Recovering
Activating
CURRENT STATE TRUTH TABLE
Rev 1.0 / Aug. 2009
Current
State
Write
Row
CS RAS CAS WE
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
X
L
L
L
L
X
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
X
L
L
L
L
X
L
L
L
L
H
H
H
H
X
H
H
H
H
X
H
H
H
H
L
L
L
L
L
L
L
L
L
BA0/
BA1
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
X
X
X
X
X
X
X
X
Command
OP CODE
OP CODE
OP CODE
Col Add. A10
Col Add. A10
Col Add. A10
Col Add. A10
Col Add. A10
Col Add. A10
A
Row Add.
Row Add.
Row Add.
max
(Sheet 3 of 4)
X
X
X
X
X
X
X
X
X
X
X
-A0
Mode Register Set
Auto or Self Refresh ILLEGAL
Precharge
Bank Activate
Write/WriteAP
Read/ReadAP
No Operation
Device Deselect
Mode Register Set
Auto or Self Refresh ILLEGAL
Precharge
Bank Activate
Write/WriteAP
Read/ReadAP
No Operation
Device Deselect
Mode Register Set
Auto or Self Refresh ILLEGAL
Precharge
Bank Activate
Write/WriteAP
Read/ReadAP
No Operation
Description
Synchronous DRAM Memory 256Mbit
ILLEGAL
No Operation:
Bank(s) idle after t
ILLEGAL
ILLEGAL
ILLEGAL
No Operation:
Bank(s) idle after t
No Operation:
Bank(s) idle after t
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
No Operation: Row
Active after t
No Operation: Row
Active after t
ILLEGAL
ILLEGAL
ILLEGAL
Start Write:
Optional AP(A10=H)
Start Read: Optional
AP(A10=H)
No Operation:
Row Active after t
H57V2562GFR Series
Action
RCD
RCD
DPL
RP
RP
RP
Notes
4,11,1
4,12
4,12
4,12
4,12
4,12
4,12
4,13
4,12
18
13
13
13
13
13
13
2
9