H5PS5162FFR-S5 HYNIX [Hynix Semiconductor], H5PS5162FFR-S5 Datasheet - Page 4

• Manufacturer Part Number: H5PS5162FFR-S5
• Description: 512Mb DDR2 SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Ordering Information
Rev. 1.0 / July. 2008
Note:
1. -XX* is the speed bin, refer to the Operation Frequency table for
complete Part No.
2. Hynix Halogen-free products are compliant to RoHS.
Hynix supports Lead & Halogen free parts for each speed grade
with same specification, except Lead free materials.
We'll add "R" character after "F" for Lead & Halogen free products.
3. H5PS5162FFR-XXC is commertial temp. and normal power
4. H5PS5162FFR-XXL is commertial temp. and low power
5. H5PS5162FFR-XXI is Industrial temp. and normal power
H5PS5162FFR**-XX*
1. Description
1.1 Device Features & Ordering Information
1.1.1 Key Features
• VDD ,VDDQ =1.8 +/- 0.1V
• All inputs and outputs are compatible with SSTL_18 interface
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS)
• Differential Data Strobe (DQS, DQS)
• Data outputs on DQS, DQS edges when read (edged DQ)
• Data inputs on DQS centers when write(centered DQ)
• On chip DLL align DQ, DQS and DQS transition with CK transition
• DM mask write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
• Programmable CAS latency 3, 4, 5 and 6 supported
• Programmable additive latency 0, 1, 2, 3, 4 and 5 supported
• Programmable burst length 4 / 8 with both nibble sequential and interleave mode
• Internal four bank operations with single pulsed RAS
• Auto refresh and self refresh supported
• tRAS lockout supported
• 8K refresh cycles /64ms
• JEDEC standard 84ball FBGA(x16) : 8mm x 13mm
• Full strength driver option controlled by EMRS
• On Die Termination supported
• Off Chip Driver Impedance Adjustment supported
• Self-Refresh High Temperature Entry
• Partial Array Self Refresh support
Part No.
Organization
32Mx16
Lead & Halo-
gen free**
Package
Operating Frequency
Speed Bin
E3
C4
Y5
S5
S6
tCK(ns)
3.75
2.5
2.5
5
3
H5PS5162FFR series
CL
3
4
5
5
6
tRCD
3
4
5
5
6
tRP
3
4
5
5
6
Release
Unit
Clk
Clk
Clk
Clk
Clk
4