GAL6002B-20LJ LATTICE [Lattice Semiconductor], GAL6002B-20LJ Datasheet
GAL6002B-20LJ
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GAL6002B-20LJ Summary of contents
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Features • HIGH PERFORMANCE E 2 CMOS ® TECHNOLOGY — 15ns Maximum Propagation Delay — 75MHz Maximum Frequency — 6.5ns Maximum Clock to Output Delay — TTL Compatible 16mA Outputs — UltraMOS ® Advanced CMOS Technology • ACTIVE PULL-UPS ON ...
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... Part Number Description GAL6002B Device Name Speed (ns Low Power Power ...
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Input Logic Macrocell (ILMC) and I/O Logic Macrocell (IOLMC) The GAL6002 features two configurable input sections. The ILMC section corresponds to the dedicated input pins (2-11) and the IOLMC to the I/O pins (14-23). Each input section is individually configurable ...
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ILMC and IOLMC Configurations INPUT or I/O Input Macrocell JEDEC Fuse Numbers INSYNC INLATCH ILMC 8218 8219 0 8220 8221 1 8222 8223 2 8224 8225 3 8226 8227 4 8228 8229 5 8230 8231 6 8232 8233 7 8234 ...
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OLMC and BLMC Configurations OLMC ONLY XORD(i) D Vcc XORE(i) E CKS(i) OLMC JEDEC Fuse Numbers OLMC CKS OUTSYNC 0 8178 8179 1 8182 8183 2 8186 8187 3 8190 8191 4 8194 8195 5 8198 8199 6 8202 8203 ...
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Logic Diagram Specifications GAL6002 6 ...
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Logic Diagram (Continued) Specifications GAL6002 7 ...
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Absolute Maximum Ratings Supply voltage V ...................................... –0.5 to +7V CC Input voltage applied .......................... –2 Off-state output voltage applied ......... –2 Storage Temperature ................................ –65 to 150 C Ambient Temperature with Power Applied ........................................ –55 ...
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AC Switching Characteristics TEST DESCRIPTION PARAM. COND pd1 A Combinatorial Input to Combinatorial Output t pd2 A Feedback or I/O to Combinational Output t pd3 A Transparent Latch Input to Combinatorial Output t co1 A Input Latch ...
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AC Switching Characteristics (Continued) TEST DESCRIPTION PARAMETER COND wl1 — ICLK Pulse Duration, Low t wl2 — OCLK Pulse Duration, Low t wl3 — STCLK Pulse Duration, Low t arw — Reset Pulse Duration ...
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Switching Waveforms INPUT or I/O FEEDBACK COMBINATORIAL OUTPUT Combinatorial Output INPUT or VALID INPUT I/O FEEDBACK t t su1 ICLK (LATCH) t pd3 COMBINATORIAL OUTPUT Latched Input INPUT or VALID INPUT I/O FEEDBACK t su4 Sum Term CLK REGISTERED OUTPUT ...
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Descriptions CLK LOGIC REGISTER ARRAY max with External Feedback 1/( Note: fmax with external feedback is calculated from measured tsu and tco. CLK LOGIC REGISTER ARRAY f max with No Feedback Note: fmax with no feedback ...
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Array Description 2 The GAL6002 contains two E reprogrammable arrays. The first is an AND array and the second array. These arrays are de- scribed in detail below. AND ARRAY The AND array is organized as 78 ...
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Power-Up Reset INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL6002 provides a reset signal to all registers during power-up. All internal registers will have their Q outputs set low after a specified time (tpr ...
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Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 ...
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Typical AC and DC Characteristic Diagrams Vol vs Iol 2.5 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs ...