CH7006C-V ETC, CH7006C-V Datasheet - Page 46

• Manufacturer Part Number: CH7006C-V
• Description: Digital PC to TV Encoder Features
• Manufacturer: ETC

Register Descriptions (continued)
CIV Control Register
The following controls are available through the CIV control register:
ACIV
CIVH[1:0]
CIV[25:24]
Calculated Increment Value Register
The CIV registers 22H through 24H contain a 26-bit value, which is the calculated increment value that should be
used as the upper 26 bits of FSCI. This value is determined by a comparison of the pixel clock and the 14MHz
clock. The bit locations and calculation of CIV are specified as the following:
Register
21H
22H
23H
24H
Version ID Register
This read-only register contains a 8-bit value indicating the identification number assigned to this version of the
CH7006. The default value shown is pre-programmed into this chip and is useful for checking for the correct
version of this chip, before proceeding with its programming.
CHRONTEL
46
Bit:
Symbol:
Type:
Default:
Bit:
Symbol:
Type:
Default:
Bit:
Symbol:
Type:
Default:
7
7
R
0
7
R
0
CIV#
VID7
When the automatic calculated increment value is 1, the number calculated and present at the CIV
registers will automatically be used as the increment value for subcarrier generation, removing the
1, the subcarrier generation must be forced to free-run mode.
These bits control the hysteresis circuit which is used to calculate the CIV value.
See descriptions in the next section.
Contents
CIV[25:24]
CIV[23:16]
CIV[15:8]
CIV[7:0]
need for the user to read the CIV value and write in a new FSCI value. Whenever this bit is set to
6
6
CIV#
R
0
6
VID6
R
0
5
5
CIV#
R
0
5
VID5
R
1
4
4
CIV#
R
0
4
VID4
R
0
CIV25
R
0
3
VID3
R
1
3
CIV24
R
0
3
CIV#
R
0
2
VID2
R
0
2
CIVH1
0
2
CIV#
R
0
R/W
201-0000-026 Rev 2.1, 8/2/99
Symbol: CIVC
Address: 21H
Bits: 5
Symbol: CIV
Address: 22H - 24H
Bits: 8
Symbol: VID
Address: 25H
Bits: 8
1
VID1
R
1
1
CIVH0
R/W
0
1
CIV#
R
0
CH7006C
0
VID0
R
0
0
ACIV
R/W
1
0
CIV#
R
0