DM8603EP DAVICOM [Davicom Semiconductor, Inc.], DM8603EP Datasheet - Page 79

• Manufacturer Part Number: DM8603EP
• Description: 10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

Preliminary datasheet
DM8603-12-DS-P01
November 8, 2010
(4). Check the busy bit again, wait for available.
(5). Read the command status from Address Table Control & Status Register (REG 15h.10h.[14:13]).
(1). Check the busy bit of Address Table Control & Status Register (REG 15h.10h.[15]) to seek the
(2). Write the MAC address to the Address Table Data 1~3 Registers (REG 15h.12h~14h).
(3). Write the “SEARCH” command and assign the target table to Address Table Control & Status
(4). Check the busy bit again, wait for available.
(5). Read the command status from Address Table Control & Status Register (REG 15h.10h.[14:13]).
(6). Read the Port Number or Port Map to Address Table Data 0 Register (REG 15h.11h.[2:0]).
(7). If need, read the entry sequence (the sequence number of entry in address table) from Address
(8). If need, read the entry’s attributes that include static (unicast address table only) and IGMP Entry
(1). Check the busy bit of Address Table Control & Status Register (REG 15h.10h.[15]) to seek the
(2). Write the entry sequence to the Address Table Data 1 Register (REG 15h.12h).
(3). Write the “READ” command and assign the target table to Address Table Control & Status Register
(4). Check the busy bit again, wait for available.
(5). Read the command status from Address Table Control & Status Register (REG 15h.10h.[14:13]).
(6). Read the Port Number or Port Map to Address Table Data 0 Register (REG 15h.11h.[2:0]).
(7). If target is unicast or multicast address table, read the entry’s MAC address from Address Table
(8). If target is unicast address table, read the entry’s attributes such as static from Address Table Data
availability of access engine. Waiting until engine is available and to keep on following.
Register (REG 15h.10h.[4:0]) to start the operation.
Table Data 1 Register (REG 15h.12h).
(multicast address table only) from Address Table Data 4 Register (REG 15h.15h.[0] for static and
REG 15h.15h.[12] for IGMP Entry).
availability of access engine. Waiting until engine is available and to keep on following.
(REG 15h.10h.[4:0]) to start the operation.
Data 1~3 Register (REG 15h.12h~14h). If target is IGMP membership table, read the real memory
address from Address Table Data 1 Register (REG 15h.12h.[10:0]).
4 Register (REG 15h.15h.[0]). For multicast address table, IGMP Entry can be read from Address
Table Data 4 Register (REG 15h.15h.[12]). For IGMP membership table, IGMP valid signal and
per-port aged timer can be read from Address Table Data 2~3 Register (REG 15h.13h.[2:0], REG
15h.14h[5:0]).
Entry Search
Entry Read
10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface
DM8603
79