AX88796BLI ASIX [ASIX Electronics Corporation], AX88796BLI Datasheet - Page 14
AX88796BLI
Manufacturer Part Number
AX88796BLI
Description
Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
1.AX88796BLI.pdf
(82 pages)
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4.1.5 Aggregate Address Filter with Receive Configuration Setup
The final address filter decision depends on the destination address types, identified by the above 4 address match
filters, and the setup of parameters of Receive Configuration Register.
Definitions of address match filter result are as following:
The meaning of AB, AM and PRO signals, please refer to “Receive Configuration Register” RCR (offset 0Ch)
The meaning of VLANE signal, Please refer to “MAC Configure Register” MCR (offset 1Bh)
Aggregate Address Filter function will be:
Signal
Phy
Mul
Bro
VID
AGG
VLANE
VID
Value
=1
=0
=1
=0
=1
=0
=1
=0
=1
=0
/Mul
PRO
/Bro
/Bro
Mul
AM
Phy
Bro
AB
Description
Unicast Address Match
Unicast Address not Match
Multicast Address Match
Multicast Address not Match
Broadcast Address Match
Broadcast Address not Match
VLAN ID Match
VLAN ID not Match
Aggregate Address Match
Aggregate Address not Match
14
AX88796BLF / AX88796BLI
ASIX ELECTRONICS CORPORATION
AGG
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