M12L16161A-5T ESMT [Elite Semiconductor Memory Technology Inc.], M12L16161A-5T Datasheet - Page 12

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M12L16161A-5T

Manufacturer Part Number
M12L16161A-5T
Description
512K x 16Bit x 2Banks Synchronous DRAM
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet

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*Note: 1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
Elite Semiconductor Memory Technology Inc.
2. Bank active & read/write are controlled by BA.
3.Enable and disable auto precharge function are controlled by A10/AP in read/write command.
4.A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP
A10/AP BA
BA
0
1
0
1
0
0
1
BA
X
0
1
0
1
0
1
Active & Read/Write
Both Banks
precharge
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
Bank A
Bank B
Bank A
Bank B
Operation
P.12
Publication Date : Jan. 2000
M12L16161A
Revision : 1.3u

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