MN838898 PANASONIC [Panasonic Semiconductor], MN838898 Datasheet - Page 6

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MN838898

Manufacturer Part Number
MN838898
Description
CMOS LSI source driver for color TFT LCD panels
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet
MN838898
Start pulse inputs
STHR (RL = High)
STHL (RL = Low)
Internal
DX/DY/DZ0 to 5
data
6.5 Data Inverse Function
6.3 Power Save Function
6.4 Blanking Interval
YX01 to 120,
YY01 to 120,
YZ01 to 120
 
Driving the INV input at High level inverts all bits in the data input.
DX 0 to 5
IDX0 to 5
This signal can be switched anywhere except the latch signal, rising edges in the FY signal.
The following timing chart summarizes the relationships between the load data
(LD) and start pulse (STHR and STHL) inputs and the blanking interval.
INV
FY
LD
FY
FY
LD
PS
00
N-4
3F
00
N-3
Figure 6.3 High-Impedance Output Interval
00
Driving the INV input at High level inverts all bits in the data input.
Figure 6.4 Blanking Interval
00
N-2
Final data input
3F
Figure 6.5 Data Inverse Function
SDF00030AEM
07
N-1
07
1 FY (Max)
3F
N
3F
2 FY (Min)
Blanking interval
3F
2FY(Min)
00
3F
3F
1FY
00
1
Hi-Z
00
First data input for first line
00
2
00
05
1
3
05
08
4
08
6

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