MN838898 PANASONIC [Panasonic Semiconductor], MN838898 Datasheet - Page 8

no-image

MN838898

Manufacturer Part Number
MN838898
Description
CMOS LSI source driver for color TFT LCD panels
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet
MN838898
 6.7 Cascade Connection
Pulse #1
Pulse #2
DATA
FY
(2) RL = Low
LCD controller
data or 1-bit data
Start pulse
(1) RL = High
6-bit RGB
The start pulse input is from STHL; the carry output, from STHR. Apart from that, operation is the same
as for RL = High.
Driver A starts latching data one FY cycle after receiving a start pulse (STHR).
It asserts the carry signal (STHL) one FY cycle before latching the last data and then stopping.
MODE1 = High (360 outputs): 119 FY cycles
MODE1 = Low (324 outputs): 107 FY cycles
Cascade Connection
Driver B starts latching data one FY cycle after receiving the carry signal (STHL) from driver A.
Note: Although the carry signal (STHL) pulses are two FY cycles long, only the first cycle counts.
The next driver treats the two cycles as a single pulse.
(1)
STHR
Driver A
Figure 6.7 Serial Cascade Connection
1FY
119 FY cycles (360 outputs)
SRH L
1
Data latched by driver A
(2)
SDF00030AEM
2
STHR
3
Driver B
・・・・
STHL
119
1FY
120
1FY
121
Data latched by driver B
STHR
Driver C
122
STHL
123
124
8

Related parts for MN838898