STMPE1801BJR STMicroelectronics, STMPE1801BJR Datasheet - Page 15

no-image

STMPE1801BJR

Manufacturer Part Number
STMPE1801BJR
Description
Touch Screen Converters & Controllers Xpander Logic 18-Bit 18 GPIO 1.65 to 3.6V
Manufacturer
STMicroelectronics
Datasheet

Specifications of STMPE1801BJR

Rohs
yes
Input Type
1 Keypad
Data Rate
400 kbps
Resolution
18 bit
Interface Type
I2C
Supply Voltage
1.65 V to 3.6 V
Supply Current
28 uA
Operating Temperature
- 40 C to + 85 C
Package / Case
CSP-25
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.65 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STMPE1801BJR
Manufacturer:
Intersil
Quantity:
1 048
Part Number:
STMPE1801BJR
Manufacturer:
ST
0
Part Number:
STMPE1801BJR
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STMPE1801BJR
Quantity:
65 000
STMPE1801
6.5
6.6
6.7
6.8
Acknowledge bit (ACK)
The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter
releases the SDA after sending eight bits of data. During the ninth bit, the receiver pulls the
SDA low to acknowledge the receipt of the eight bits of data. The receiver may leave the
SDA in high state if it does not acknowledge the receipt of the data.
Data input
The device samples the data input on SDA on the rising edge of the SCL. The SDA signal
must be stable during the rising edge of SCL and the SDA signal must change only when
SCL is driven low.
Memory addressing
For the bus master to communicate to the slave device, the bus master must initiate a Start
condition and be followed by the slave device address. Accompanying the slave device
address, there is a Read/Write bit (R/W). The bit is set to 1 for Read and 0 for Write
operation.
If a match occurs on the slave device address, the corresponding device gives an
acknowledgement on the SDA during the 9th bit time. If there is no match, it deselects itself
from the bus by not responding to the transaction.
Operation modes
Table 9.
Mode
Read
Operating modes
Byte
1
START, Device address, R/W
=0, Register Address to be read
RESTART, Device Address, R/W
=1, Data Read, STOP
If no STOP is issued, the Data Read can be continuously performed. If
the register address falls within the range that allows address auto-
increment, then register address auto-increments internally after every
byte of data being read. For register address that fails within a non-
incremental address range, the address is kept static throughout the
entire read operation. Refer to
table
An example of such a non-increment address is FIFO.
Doc ID 17884 Rev 3
for the address ranges that are auto-increment and non-increment.
Programming sequence
Table 8.: STMPE1801 register summary
I2C specification
15/60

Related parts for STMPE1801BJR