MAX1034BEUG+ Maxim Integrated, MAX1034BEUG+ Datasheet - Page 15

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MAX1034BEUG+

Manufacturer Part Number
MAX1034BEUG+
Description
Analog to Digital Converters - ADC 8-/4-Channel, Multirange Inputs,
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1034BEUG+

Rohs
yes
Number Of Channels
8/4
Architecture
SAR
Conversion Rate
115 kSPs
Resolution
14 bit
Input Type
Single-Ended/Differential
Snr
84.5 dB
Interface Type
3-Wire, QSPI, SPI
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-24
Maximum Power Dissipation
1111.1 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.136 V
Figure 2. External Clock-Mode Conversion (Mode 0)
The analog inputs can be individually configured for
either differential or single-ended conversions by writing
the associated analog input configuration byte (Table 2).
The analog input signal source must be capable of dri-
ving the ADC’s 6kΩ input resistance (Figure 6).
Figure 6 shows the simplified analog input circuit. The
analog inputs are ±6V fault tolerant and are protected
by back-to-back diodes. The summing junction voltage,
V
voltage:
As a result, the analog input impedance is relatively
constant over the input voltage as shown in Figure 5.
Single-ended conversions are internally referenced to
AGND1 (Tables 3 and 4). In differential mode, IN+ and
IN- are selected according to Tables 3 and 5. When con-
figuring differential channels, the differential pair follows
V
SJ
SJ
SSTRB
TRACK AND HOLD*
DOUT
SCLK
, is a function of the channel’s input common-mode
DIN
CS
ANALOG INPUT
=
IMPEDANCE
HIGH
R
1
*TRACK AND HOLD TIMING IS CONTROLLED BY SCLK.
R
+
1
S
HOLD
R
2
C2
⎟ ×
______________________________________________________________________________________
C1
2 375
C0
8-/4-Channel, ±V
.
0
BYTE 1
V
Analog Input Circuitry
0
+
0
1
+
0
R
1
TRACK
t
ACQ
R
+
1
R
2
⎟ ×
BYTE 2
V
CM
f
SAMPLE
≈ f
SAMPLING INSTANT
SCLK
/ 32
the analog configuration byte for the positive channel.
For example, to configure CH2 and CH3 for a ±V
ferential conversion, set the CH2 analog configuration
byte for a differential conversion with the ±V
(1010 1100). To initiate a conversion for the CH2 and
CH3 differential pair, issue the command 1010 0000.
The MAX1034/MAX1035 input-tracking circuitry has a
1.5MHz small-signal bandwidth. The 1.5MHz input
bandwidth makes it possible to digitize high-speed
transient events. Harmonic distortion increases when
digitizing signal frequencies above 15kHz as shown in
the -SFDR, THD vs. Analog Input Frequency plot in the
Typical Operating Characteristics .
Figure 7 illustrates the software-selectable single-
ended analog input voltage range that produces a valid
digital output. Each analog input channel can be inde-
pendently programmed to one of seven single-ended
input ranges by setting the R[2:0] control bits with
DIF/SGL = 0.
B13
REF
B12
Analog Input Range and Fault Tolerance
B11
B10
BYTE 3
Serial 14-Bit ADCs
Multirange Inputs,
B9
B8
B7
HOLD
B6
B5
Analog Input Bandwidth
B4
B3
B2
BYTE 4
B1
B0
X
X
REF
IMPEDANCE
HIGH
REF
range
dif-
15

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