MAX1034BEUG+ Maxim Integrated, MAX1034BEUG+ Datasheet - Page 21

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MAX1034BEUG+

Manufacturer Part Number
MAX1034BEUG+
Description
Analog to Digital Converters - ADC 8-/4-Channel, Multirange Inputs,
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1034BEUG+

Rohs
yes
Number Of Channels
8/4
Architecture
SAR
Conversion Rate
115 kSPs
Resolution
14 bit
Input Type
Single-Ended/Differential
Snr
84.5 dB
Interface Type
3-Wire, QSPI, SPI
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-24
Maximum Power Dissipation
1111.1 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.136 V
Communication with the MAX1034/MAX1035 is accom-
plished using the three input data word formats shown
in Table 3. Each input data word begins with a start bit.
The start bit is defined as the first high bit clocked into
DIN with CS low when any of the following are true:
• Data conversion is not in process and all data from
• The device is configured for operation in external
• The device is configured for operation in external
• The device is configured for operation in internal
Figure 9. Common-Mode Voltage vs. Input Voltage (FSR = V
Figure 11. Common-Mode Voltage vs. Input Voltage (FSR = 4 x
V
REF
the previous conversion has clocked out of DOUT.
clock mode (mode 0) and previous conversion-result
bits B13–B1 have clocked out of DOUT.
acquisition mode (mode 1) and previous conversion-
result bits B13–B5 have clocked out of DOUT.
clock mode (mode 2) and previous conversion-
result bits B13–B2 have clocked out of DOUT.
)
-2
-4
-6
-2
-4
-6
6
4
2
0
6
4
2
0
INPUT COMMON-MODE VOLTAGE RANGE
-8
INPUT COMMON-MODE VOLTAGE RANGE
-8
vs. OUTPUT VOLTAGE (FSR = 4 x V
vs. OUTPUT VOLTAGE (FSR = V
______________________________________________________________________________________
-6
-6
8-/4-Channel, ±V
-4
-4
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
-2
-2
0
0
2
2
V
V
REF
REF
4
4
= 4.096V
= 4.096V
REF
6
6
REF
)
)
8
8
Start Bit
REF
)
Output data is clocked out of DOUT in offset binary for-
mat on the falling edge of SCLK, MSB first (B13). For
output binary codes, see the Transfer Function section
and Figures 12, 13, and 14.
Each analog input has two configurable parameters:
• Single-ended or true-differential input
• Input voltage range
These parameters are configured using the analog input
configuration byte as shown in Table 2. Each analog
input has a dedicated register to store its input configura-
tion information. The timing diagram of Figure 15 shows
how to write to the analog input configuration registers.
Figure 16 shows DOUT and SSTRB timing.
An ADC’s transfer function defines the relationship
between the analog input voltage and the digital output
code. Figures 12, 13, and 14 show the MAX1034/
MAX1035 transfer functions. The transfer function is
determined by the following characteristics:
• Analog input voltage range
• Single-ended or differential configuration
• Reference voltage
The axes of an ADC transfer function are typically in least
significant bits (LSBs). For the MAX1034/MAX1035, an
LSB is calculated using the following equation:
where N is the number of bits (N = 14) and FSR is the
full-scale range (see Figures 7 and 8).
Figure 10. Common-Mode Voltage vs. Input Voltage (FSR = 2 x
V
REF
REF
)
Serial 14-Bit ADCs
Multirange Inputs,
-2
-4
-6
6
4
2
0
1
INPUT COMMON-MODE VOLTAGE RANGE
-8
vs. OUTPUT VOLTAGE (FSR = 2 x V
LSB
-6
=
-4
INPUT VOLTAGE (V)
2
FSR
-2
N
Configuring Analog Inputs
×
0
×
4 096
Transfer Function
2
.
V
Output Data Format
REF
V
REF
4
V
= 4.096V
6
REF
)
8
21

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