MAX1034BEUG+ Maxim Integrated, MAX1034BEUG+ Datasheet - Page 18

• Manufacturer Part Number: MAX1034BEUG+
• Description: Analog to Digital Converters - ADC 8-/4-Channel, Multirange Inputs,
• Manufacturer: Maxim Integrated

Specifications of MAX1034BEUG+

• Rohs: yes
• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 115 kSPs
• Resolution: 14 bit
• Input Type: Single-Ended/Differential
• Snr: 84.5 dB
• Interface Type: 3-Wire, QSPI, SPI
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-24
• Maximum Power Dissipation: 1111.1 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 4.136 V

The MAX1034/MAX1035 differential common-mode
range (V
obtain valid conversion results. The differential com-
mon-mode range is defined as:
In addition to the common-mode input voltage limita-
8-/4-Channel, ±V
Serial 14-Bit ADCs
Table 3. Input Data Word Formats
Table 4. Channel Selection in Single-Ended Mode (DIF/SGL = 0)
Table 5. Channel Selection in True-Differential Mode (DIF/SGL = 1)
18
Conversion-Start Byte
(Tables 4 and 5)
Analog-Input Configuration Byte
(Table 2)
Mode-Control Byte
(Table 7)
C2
C2
CHANNEL-SELECT BIT
CHANNEL-SELECT BIT
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
______________________________________________________________________________________
CMDR
OPERATION
Differential Common-Mode Range
V
C1
C1
CMDR
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
) must remain within -4.75V to +5.5V to
=
C0
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(
CH
_
+
)
CH0
CH0
2
+
+
+
(
(START)
CH
D7
1
1
1
_
REF
−
)
CH1
CH1
+
-
D6
C2
C2
M2
Multirange Inputs,
CH2
CH2
+
+
D5
C1
C1
M1
tions, each individual analog input must be limited to
±6V with respect to AGND1.
The range-select bits R[2:0] in the analog input configu-
ration bytes determine the full-scale range for the corre-
sponding channel (Tables 2 and 6). Figures 9, 10, and
11 show the valid analog input voltage ranges for
the MAX1034/MAX1035 when operating with FSR =
V
The shaded area contains the valid common-mode
voltage ranges that support the entire FSR.
CH3
CH3
REF
+
-
/ 2, FSR = V
RESERVED
RESERVED
RESERVED
RESERVED
CHANNEL
CHANNEL
D4
C0
C0
M0
DATA BIT
CH4
CH4
+
+
DIF/SGL
REF
D3
0
1
CH5
CH5
, and FSR = 2 x V
+
-
D2
R2
0
0
CH6
CH6
+
+
REF
D1
R1
CH7
CH7
0
0
+
-
, respectively.
AGND1
AGND1
D0
R0
0
0
-
-
-
-
-
-
-
-