IDT74SSTUBF32865ABKG8 IDT, Integrated Device Technology Inc, IDT74SSTUBF32865ABKG8 Datasheet - Page 14

• Manufacturer Part Number: IDT74SSTUBF32865ABKG8
• Description: IC BUFFER 28BIT 1:2 REG 160-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT74SSTUBF32865ABKG8

• Number Of Bits: 28
• Logic Type: 1:2 Registered Buffer with Parity
• Supply Voltage: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BGA
• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Inputs: 28
• Number Of Outputs: 56
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 410(Min)MHz
• Mounting: Surface Mount
• Pin Count: 160
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74SSTUBF32865ABKG8

Test Circuits and Waveforms (V
28-BIT 1:2 REGISTERED BUFFER WITH PARITY
IDT74SSTUBF32865A
28-BIT 1:2 REGISTERED BUFFER WITH PARITY
Voltage Waveforms: High-to-Low Slew-Rate Adjustment
Voltage Waveforms: Low-to-High Slew-Rate Adjustment
Output
Output
Load Circuit: High-to-Low Slew-Rate Adjustment
Load Circuit: Low-to-High Slew-Rate Adjustment
NOTES:
1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10MHz, Zo = 50Ω , input
slew rate = 1 V/ns ±20% (unless otherwise specified).
dv_f
dv_r
DUT
Out
DUT
Out
C
80%
L
20%
C
= 10 pF
L
= 10 pF
dt_r
dt_f
80%
20%
V
DD
Test Point
R
L
= 50
R
Test Point
L
= 50
DD
V
V
V
V
OH
OL
OH
OL
= 1.8V ± 0.1V)
14
Waveform 1
Waveform 2
Waveform 2
Voltage Waveforms: Open Drain Output Low-to-High
Voltage Waveforms: Open Drain Output High-to-Low
Voltage Waveforms: Open Drain Output Low-to-High
LVCMOS
Timing
Timing
Inputs
Inputs
Output
RESET
Output
Output
Transition Time (with respect to RESET input)
Transition Time (with respect to clock inputs)
Transition Time (with respect to clock inputs)
Input
Load Circuit: Error Output Measurements
t
DUT
PLH
t
HL
V
V
t
HL
COMMERCIAL TEMPERATURE GRADE
ICR
Out
ICR
V
V
CC
0.15V
CC
0.15V
/2
/2
C
L
= 10 pF
V
IDT74SSTUBF32865A
V
ICR
ICR
V
DD
Test Point
R
L
= 1K
V
V
V
7092/11
I(PP)
V
I(PP)
V
0V
V
V
0V
OH
0V
CC
CC
OH
OL