LCMXO1200E-4TN144I Lattice, LCMXO1200E-4TN144I Datasheet - Page 93

• Manufacturer Part Number: LCMXO1200E-4TN144I
• Description: CPLD - Complex Programmable Logic Devices 1200 LUTs 113 IO 1.2 V -4 Spd I
• Manufacturer: Lattice

Specifications of LCMXO1200E-4TN144I

• Rohs: yes
• Memory Type: SRAM
• Number Of Macrocells: 600
• Maximum Operating Frequency: 550 MHz
• Delay Time: 4.4 ns
• Number Of Programmable I/os: 113
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TQFP-144
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 300
• Supply Current: 18 mA
• Supply Voltage - Max: 1.26 V
• Supply Voltage - Min: 1.14 V

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November 2007
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site.
For further information on interface standards refer to the following web sites:
• TN1091,
• TN1089,
• TN1092,
• TN1090,
• TN1086,
• TN1087,
• TN1097,
• AN8066,
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
MachXO sysIO Usage Guide
MachXO sysCLOCK Design and Usage Guide
Memory Usage Guide for MachXO Devices
Power Estimation and Management for MachXO Devices
MachXO JTAG Programming and Configuration User’s Guide
Minimizing System Interruption During Configuration Using TransFR Technology
MachXO Density Migration
Boundary Scan Testability with Lattice sysIO Capability
6-1
MachXO Family Data Sheet
Supplemental Information
DS1002 Further Information_01.2
Data Sheet DS1002