ADC1213D080HN-C1 IDT, ADC1213D080HN-C1 Datasheet - Page 13

• Manufacturer Part Number: ADC1213D080HN-C1
• Description: Analog to Digital Converters - ADC
• Manufacturer: IDT

Specifications of ADC1213D080HN-C1

• Rohs: yes

Integrated Device Technology
11. Application information
ADC1213D_SER 8
Product data sheet
11.1.1 Input stage description
10.4 SPI timing
11.1 Analog inputs
Table 8.
[1]
The analog input of the ADC1213D supports a differential or a single-ended input drive.
Optimal performance is achieved using differential inputs with the common-mode input
voltage (V
The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)
via a programmable internal reference (see Section 11.2 and Table 21).
Figure 6 shows the equivalent circuit of the sample-and-hold input stage, including
ElectroStatic Discharge (ESD) protection and circuit and package parasitics.
Symbol
t
t
t
t
t
f
su
w(SCLK)
w(SCLKH)
w(SCLKL)
h
clk(max)
Fig 5.
Typical values measured at V
across the full temperature range T
INBP)  V
unless otherwise specified.
SPI timing
I(cm)
SCLK
SPI timing characteristics
SDIO
I
CS
(INAM,INBM) = 1 dBFS; internal reference mode; 100  differential applied to serial outputs;
) on pins INxP and INxM set to 0.5V
Parameter
SCLK pulse width
SCLK HIGH pulse width
SCLK LOW pulse width
set-up time
hold time
maximum clock frequency
t
su
R/W
Rev. 08 — 2 July 2012
DDA
W1
t
h
t
= 3 V, V
su
amb
W0
= 40 C to +85 C at V
t
w(SCLK)
[1]
DDD
Conditions
data to SCLK H
CS to SCLK H
data to SCLK H
CS to SCLK H
= 1.8 V, T
A12
Dual 12-bit ADC; serial JESD204A interface
amb
A11
t
w(SCLKL)
DDA
= 25 C. Minimum and maximum values are
ADC1213D series
t
w(SCLKH)
.
DDA
D2
= 3 V, V
Min
-
-
-
-
-
-
-
-
D1
DDD
Typ
40
16
16
5
5
2
2
25
= 1.8 V; V
D0
Max
-
-
-
-
-
-
-
-
t
h
005aaa065
© IDT 2012. All rights reserved.
I
(INAP,
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
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