ADC1213D080HN-C1 IDT, ADC1213D080HN-C1 Datasheet - Page 7

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ADC1213D080HN-C1

Manufacturer Part Number
ADC1213D080HN-C1
Description
Analog to Digital Converters - ADC
Manufacturer
IDT
Datasheet

Specifications of ADC1213D080HN-C1

Rohs
yes
Integrated Device Technology
Table 5.
ADC1213D_SER 8
Product data sheet
Symbol
P
Clock inputs: pins CLKP and CLKM (AC-coupled)
Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
V
SINE
V
Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS)
V
V
Logic inputs: Power-down: pins CFG0 to CFG3, SCRAMBLER, SWING_0, SWING_1, and RESET
V
V
I
I
SPI: pins CS, SDIO, and SCLK
V
V
I
I
C
Analog inputs: pins INAP, INAM, INBP, and INBM
I
R
C
V
B
V
Voltage controlled regulator output: pins VCMA and VCMB
V
I
IL
IH
IL
IH
I
O(cm)
i(clk)dif
i(clk)dif
IL
IH
IL
IH
IL
IH
I(cm)
i
I(dif)
O(cm)
I
I
I
Static characteristics
Parameter
power dissipation
differential clock input
voltage
differential clock input
voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
input current
input resistance
input capacitance
common-mode input
voltage
input bandwidth
differential input voltage
common-mode output
voltage
common-mode output
current
[1]
…continued
peak-to-peak
Conditions
Power-down mode
Standby mode
peak-to-peak
peak-to-peak
track mode
track mode
track mode
track mode
Rev. 08 — 2 July 2012
Min
-
-
-
0.8
-
0.7V
-
-
6
30
0
0.7V
10
50
-
5
0.9
-
1
-
-
-
-
Dual 12-bit ADC; serial JESD204A interface
DDA
DDA
ADC1213D series
Typ
30
200
0.8
1.5
-
-
0
0.66V
-
-
-
-
-
-
4
-
15
5
1.5
600
-
V
4
DDA
/ 2
DDD
-
-
0.3V
-
+30
0.3V
+10
+50
-
2
Max
-
-
-
-
+6
V
+5
-
-
2
-
-
-
DDA
DDA
DDA
© IDT 2012. All rights reserved.
Unit
mW
mW
V
V
V
V
V
V
A
A
V
V
A
A
pF
A
pF
V
MHz
V
V
mA
7 of 40

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