MAX11359AETL Maxim Integrated, MAX11359AETL Datasheet - Page 22

• Manufacturer Part Number: MAX11359AETL
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11359AETL

• Number Of Channels: 10
• Architecture: Sigma-Delta
• Conversion Rate: 10 SPs to 512 SPs
• Resolution: 16 bit
• Input Type: Differential
• Interface Type: 4-Wire Serial, Microwire, QSPI, SPI
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Power Dissipation: 2051.3 mW
• Number Of Converters: 1
• Voltage Reference: 1.251 V 1.996 V, 2.422 V

16-Bit Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
MAX11359A
22
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
CLK32K
32KOUT 32kHz Crystal Output. Connect external 32kHz watch crystal between 32KIN and 32KOUT.
RESET
NAME
UPIO2
UPIO3
UPIO4
DOUT
32KIN
SNO1
SCM1
SNC1
SNO2
SCM2
SNC2
OUT1
SCLK
IN1+
SWA
CLK
IN1-
FBA
DIN
INT
CS
Clock Output. Default is 2.457MHz output clock for µC.
User-Programmable Input/Output 2. See the UPIO2_CTRL Register section for functionality.
User-Programmable Input/Output 3. See the UPIO3_CTRL Register section for functionality.
User-Programmable Input/Output 4. See the UPIO4_CTRL Register section for functionality.
Serial-Data Output. Data is clocked out on SCLK’s falling edge. High impedance when CS is high. When
UPIO/SPI passthrough mode is enabled, DOUT mirrors the state of UPIO1.
Serial-Clock Input. Clocks data in and out of the serial interface.
Serial-Data Input. Data is clocked in on SCLK’s rising edge.
Active-Low Chip-Select Input. Data is not clocked into DIN unless CS is low. When CS is high, DOUT is
high impedance. High impedance when CS is high. When UPIO/SPI passthrough mode is enabled, DOUT
mirrors the state of UPIO1.
Programmable Active-High/Low Interrupt Output. ADC, UPIO wake-up, alarm, and voltage-monitor events.
32kHz Clock Input/Output. Outputs 32kHz clock for µC. Can be programmed as an input by enabling the
IO32E bit to accept an external 32kHz input clock. The RTC, PWM, and watchdog timer always use the
internal 32kHz clock derived from the 32kHz crystal.
Active-Low Open-Drain Reset Output. Remains low while DVDD is below the 1.8V voltage threshold, and
stays low for a timeout period (t
when the watchdog timer times out and holds low during POR until the 32kHz oscillator stabilizes.
32kHz Crystal Input. Connect external 32kHz watch crystal between 32KIN and 32KOUT or drive with
CMOS level as shown in Figure 25.
Analog Switch 1 Normally Open Terminal. Analog input to mux.
Analog Switch 1 Common Terminal. Analog input to mux.
Analog Switch 1 Normally Closed Terminal. Analog input to mux (open on POR).
Analog Switch 2 Normally Open Terminal. Analog input to mux.
Analog Switch 2 Common Terminal. Analog input to mux (open on POR).
Analog Switch 2 Normally Closed Terminal. Analog input to mux.
Amplifier 1 Output. Analog input to mux.
Amplifier 1 Inverting Input. Analog input to mux.
Amplifier 1 Noninverting Input
DACA SPST Shunt Switch Input. Connects to OUTA through a SPST switch.
DACA Force-Sense Feedback Input. Analog input to mux.
DSLP
) after DVDD rises above the 1.8V threshold. RESET also pulses low
FUNCTION
Pin Description
Maxim Integrated