ispLSI 1024EA-200LT100 Lattice, ispLSI 1024EA-200LT100 Datasheet
ispLSI 1024EA-200LT100
Specifications of ispLSI 1024EA-200LT100
Related parts for ispLSI 1024EA-200LT100
ispLSI 1024EA-200LT100 Summary of contents
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... I/O and open-drain output options. The basic unit of logic on the ispLSI 1024EA device is the Generic Logic Block (GLB). The GLBs are labeled A0, A1…D7 (Figure 1). There are a total of 24 GLBs in the ispLSI 1024EA device ...
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... Output Routing Pool (ORP) Input Bus Clocks in the ispLSI 1024EA device are selected using the Clock Distribution Network. Four dedicated clock pins (Y0, Y1, Y2 and Y3) are brought into the distribution or bi-directional network, and five clock outputs (CLK 0, CLK 1, CLK 2, IOCLK 0 and IOCLK 1) are provided to route clocks to the GLBs and I/O cells ...
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... BSCAN test Capture register hold time t btuco BSCAN test Update reg, falling edge of clock to valid output t btuoz BSCAN test Update reg, falling edge of clock to output disable t btuov BSCAN test Update reg, falling edge of clock to output enable Specifications ispLSI 1024EA T T btsu bth T btcl ...
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... Input Low Voltage IL V Input High Voltage IH o Capacitance (T =25 C, f=1.0 MHz) A SYMBOL PARAMETER C Dedicated Input, I/O, Y1, Y2, Y3, Clock Capacitance 1 (Commercial/Industrial Clock Capacitance 2 Erase/Reprogram Specifications PARAMETER Erase/Reprogram Cycles Specifications ispLSI 1024EA 1 +1.0V CC +1.0V CC PARAMETER Commercial T = 0° 70° 3.3V TYPICAL MINIMUM 10000 4 MIN. MAX. 4.75 5.25 4.75 5 ...
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... Unused inputs held at 0.0V. 5. Maximum I varies widely with specific device configuration and operating frequency. Refer to the CC Power Consumption section of this data sheet and the Thermal Management section of the Lattice Semiconductor Data Book CD-ROM to estimate maximum I Specifications ispLSI 1024EA Figure 3. Test Load GND to 3.0V 1.5ns 1.5V 1.5V ...
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... Unless noted otherwise, all parameters use a GRP load of four GLBs, 20 PTXOR path, ORP and Y0 clock. 2. Refer to Timing Model in this data sheet for further details. 3. Standard 16-bit counter using GRP feedback. 4. Reference Switching Test Conditions section. Specifications ispLSI 1024EA Over Recommended Operating Conditions 1 DESCRIPTION ...
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... ORP Bypass Delay orpbp 1. Internal Timing Parameters are not tested and are for reference only. 2. Refer to Timing Model in this data sheet for further details. 3. The XOR adjacent path can only be used by hard macros. Specifications ispLSI 1024EA 1 DESCRIPTION 3 7 -200 -125 -100 MIN ...
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... Clock Delay, Clock GLB to I/O Cell Global Clock Line iocp Global Reset t 60 Global Reset to GLB and I/O Registers gr 1. Internal Timing Parameters are not tested and are for reference only. Specifications ispLSI 1024EA 1 DESCRIPTION 8 -125 -200 -100 MIN. MAX. MIN. ...
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... Clock (max) + Reg (clock-to-out) + Output gy0(max) + gco + = (#55 + #42 + #57) + (#42) + (#48 + #50) = (0.9 + 1.4 + 1.8) + (1.4) + (0.8 + 0.9) 7.2 1. Calculations are based upon timing specifications for the ispLSI 1024EA-200. Specifications ispLSI 1024EA GRP GLB #47 Feedback #34 Comb 4 PT Bypass GRP4 Reg 4 PT Bypass GLB Reg Bypass #30 # XOR Delays ...
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... Icc can be estimated for the ispLSI 1024EA using the following equation: Icc = 17mA + (# of PTs * .726 nets * Max Freq * .0043) Where PTs = Number of Product Terms used in design # of nets = Number of Signals used in device Max freq = Highest Clock Frequency to the device (in MHz) The Icc estimate is based on typical conditions (Vcc = 5 ...
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... Supply voltage for output drivers 3.3V Connect 1, 2, 12, 13, 24, 25, 26, 27, 38, 39, 49, 50, 51, 52, 63, 64, 74, 75, 76, 77, 87, 88, 99, 100 1. Pins have dual function capability which is software selectable pins are not to be connected to any active signals, Vcc or GND. Specifications ispLSI 1024EA DESCRIPTION 11 Table 2-0002A/1024EA ...
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... Pin Configurations ispLSI 1024EA 100-Pin TQFP Pinout Diagram GOE 1/ VCC 10 VCC GND 14 GND 15 VCCIO 16 RESET 17 TDI Pins have dual function capability which is software selectable. ...
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... Ordering Information FAMILY fmax (MHz) tpd (ns) 200 ispLSI 125 100 Specifications ispLSI 1024EA 1024EA - XXX X XXXX X COMMERCIAL ORDERING NUMBER 4.5 ispLSI 1024EA-200LT100 7.5 ispLSI 1024EA-125LT100 10 ispLSI 1024EA-100LT100 13 Grade Blank = Commercial Package T100 = 100-Pin TQFP Power L = Low 0212/1024EA PACKAGE 100-Pin TQFP 100-Pin TQFP ...