ispLSI 1024EA-200LT100 Lattice, ispLSI 1024EA-200LT100 Datasheet - Page 8

• Manufacturer Part Number: ispLSI 1024EA-200LT100
• Description: CPLD - Complex Programmable Logic Devices PROGRAMMABLE HIGH DENSITY PLD
• Manufacturer: Lattice

Specifications of ispLSI 1024EA-200LT100

• Memory Type: EEPROM
• Number Of Macrocells: 24
• Maximum Operating Frequency: 200 MHz
• Delay Time: 4.5 ns
• Number Of Programmable I/os: 28
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 450
• Supply Current: 152 mA
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V

1. Internal Timing Parameters are not tested and are for reference only.
Internal Timing Parameters
Outputs
t
t
t
t
t
Clocks
t
t
t
t
t
Global Reset
t
PARAM.
ob
sl
oen
odis
goe
gy0
gy1/2
gcp
ioy2/3
iocp
gr
50 Output Buffer Delay
51 Output Buffer Delay, Slew Limited Adder
52 I/O Cell OE to Output Enabled
53 I/O Cell OE to Output Disabled
54 Global OE
55 Clock Delay, Y0 to Global GLB Clock Line (Ref. clk)
56 Clock Delay, Y1 or Y2 to Global GLB Clock Line
57 Clock Delay, Clock GLB to Global GLB Clock Line
58 Clock Delay, Y2 or Y3 to I/O Cell Global Clock Line
59 Clock Delay, Clock GLB to I/O Cell Global Clock Line
60 Global Reset to GLB and I/O Registers
#
DESCRIPTION
1
8
Specifications ispLSI 1024EA
MIN. MAX.
0.9
0.9
0.8
0.0
0.8
—
—
—
—
—
—
-200
0.9
0.9
1.8
0.0
0.9
5.0
3.1
3.1
1.4
2.8
0.0
MIN.
1.1
0.9
0.8
0.0
0.8
—
—
—
—
—
—
-125
MAX.
1.7
5.0
4.0
4.0
3.0
1.1
0.9
1.8
0.0
2.8
2.1
MIN.
1.9
1.5
0.8
0.0
0.8
—
—
—
—
—
—
-100
Table 2-0037A/1024EA
MAX.
2.0
5.0
5.1
5.1
3.9
1.9
1.5
1.8
0.0
2.8
5.1
v.2.5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns