S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 355
S912XEG128J2MAL
Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEG128J2MAL
Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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10.1.3
There are four run modes on S12XE devices.
10.1.4
Figure 10-1
Freescale Semiconductor
•
•
•
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•
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•
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Provides up to 108 XGATE channels, including 8 software triggered channels
Interruptible thread execution
Two register banks to support fast context switching between threads
Hardware semaphores which are shared between the S12X_CPU and the XGATE module
Able to trigger S12X_CPU interrupts upon completion of an XGATE transfer
Software error detection to catch erratic application code
Run mode, wait mode, stop mode
The XGATE is able to operate in all of these three system modes. Clock activity will be
automatically stopped when the XGATE module is idle.
Freeze mode (BDM active)
In freeze mode all clocks of the XGATE module may be stopped, depending on the module
configuration (see
Modes of Operation
Block Diagram
shows a block diagram of the XGATE.
Peripherals
Peripheral Interrupts
Software
Interrupt
Triggers
SWE
Section 10.3.1.1, “XGATE Control Register
XGATE
Software Error Logic
Interrupt Flags
Software Triggers
MC9S12XE-Family Reference Manual Rev. 1.25
Semaphores
Figure 10-1. XGATE Block Diagram
S12X_INT
S12X_MMC
RISC Core
(XGMCTL)”).
S12X_DBG
Chapter 10 XGATE (S12XGATEV3)
355
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