S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 634
S912XEG128J2MAL
Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEG128J2MAL
Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.3.1.1
634
Module Base + 0x00X0
Module Base + 0x00X1
ID[28:21]
ID[20:18]
ID[17:15]
Field
Field
SRR
IDE
7-0
7-5
2-0
4
3
Reset:
Reset:
W
W
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Substitute Remote Request — This fixed recessive bit is used only in extended format. It must be set to 1 by
the user for transmission buffers and is stored as received on the CAN bus for receive buffers.
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
IDR0–IDR3 for Extended Identifier Mapping
ID28
ID20
7
x
Figure 16-26. Identifier Register 0 (IDR0) — Extended Identifier Mapping
7
x
Figure 16-27. Identifier Register 1 (IDR1) — Extended Identifier Mapping
Table 16-27. IDR0 Register Field Descriptions — Extended
Table 16-28. IDR1 Register Field Descriptions — Extended
ID27
ID19
6
x
6
x
MC9S12XE-Family Reference Manual Rev. 1.25
ID26
ID18
5
x
5
x
SRR (=1)
ID25
4
x
4
x
Description
Description
IDE (=1)
ID24
x
x
3
3
ID23
ID17
2
x
2
x
Freescale Semiconductor
ID22
ID16
x
x
1
1
ID21
ID15
0
x
0
x
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