LPC11E13FBD48/301, NXP Semiconductors, LPC11E13FBD48/301, Datasheet

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LPC11E13FBD48/301,

Manufacturer Part Number
LPC11E13FBD48/301,
Description
ARM Microcontrollers - MCU 24kB 2kB EE 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC11E13FBD48/301,

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC11E1x
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Factory Pack Quantity
250

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC11E13FBD48/301,
Manufacturer:
FREESCALE
Quantity:
12
Part Number:
LPC11E13FBD48/301,
Manufacturer:
NXP Semiconductors
Quantity:
10 000
1. General description
2. Features and benefits
The LPC11E1x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for
8/16-bit microcontroller applications, offering performance, low power, simple instruction
set and memory addressing together with reduced code size compared to existing 8/16-bit
architectures.
The LPC11E1x operate at CPU frequencies of up to 50 MHz.
The peripheral complement of the LPC11E1x includes up to 32 kB of flash memory, up to
10 kB of SRAM data memory and 4 kB EEPROM, one Fast-mode Plus I
one RS-485/EIA-485 USART with support for synchronous mode and smart card
interface, two SSP interfaces, four general-purpose counter/timers, a 10-bit ADC, and up
to 54 general-purpose I/O pins.
LPC11E1x
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; up
to 10 kB SRAM and 4 kB EEPROM; USART
Rev. 1 — 20 February 2012
System:
Memory:
Debug options:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Non-Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Up to 32 kB on-chip flash program memory.
Up to 4 kB on-chip EEPROM data memory; byte erasable and byte programmable.
Up to 10 kB SRAM data memory.
16 kB boot ROM including 32-bit integer divide routines and power profiles.
In-System Programming (ISP) and In-Application Programming (IAP) for flash and
EEPROM via on-chip bootloader software.
Standard JTAG test interface for BSDL.
Serial Wire Debug.
Product data sheet
2
C-bus interface,

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