LPC1112FHN24/2021 NXP Semiconductors, LPC1112FHN24/2021 Datasheet - Page 50
LPC1112FHN24/2021
Manufacturer Part Number
LPC1112FHN24/2021
Description
ARM Microcontrollers - MCU
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1114FN2810212.pdf
(114 pages)
Specifications of LPC1112FHN24/2021
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1112
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
16 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Package / Case
HVQFN-24
Mounting Style
SMD/SMT
Factory Pack Quantity
2450
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NXP Semiconductors
LPC111X
Product data sheet
Fig 15. LPC1110/11/12/13/14/15 clock generation block diagram
watchdog oscillator
system oscillator
IRC oscillator
IRC oscillator
(system PLL clock select)
7.16.1.1 Internal RC oscillator
7.16.1.2 System oscillator
SYSPLLCLKSEL
Following reset, the LPC1110/11/12/13/14/15 will operate from the Internal RC oscillator
until switched by software. This allows systems to operate without any external crystal and
the bootloader code to operate at a known frequency.
See
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the
PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC is
trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the LPC1110/11/12/13/14/15 use the IRC as the clock
source. Software may later switch to one of the other available clock sources.
The system oscillator can be used as the clock source for the CPU, with or without using
the PLL.
Figure 15
SYSTEM PLL
(main clock select)
MAINCLKSEL
for an overview of the LPC1110/11/12/13/14/15 clock generation.
All information provided in this document is subject to legal disclaimers.
main clock
Rev. 8 — 20 February 2013
watchdog oscillator
watchdog oscillator
system oscillator
SYSTEM CLOCK
IRC oscillator
IRC oscillator
DIVIDER
(WDT clock update enable)
(CLKOUT update enable)
LPC1110/11/12/13/14/15
CLKOUTUEN
WDTUEN
system clock
32-bit ARM Cortex-M0 microcontroller
SYSAHBCLKCTRL[1:18]
(AHB clock enable)
CLKOUT PIN CLOCK
UART PERIPHERAL
SPI0 PERIPHERAL
SPI1 PERIPHERAL
CLOCK DIVIDER
CLOCK DIVIDER
CLOCK DIVIDER
18
WDT CLOCK
DIVIDER
DIVIDER
© NXP B.V. 2013. All rights reserved.
AHB clocks 1 to 18
(memories
and peripherals)
AHB clock 0
(system)
SPI0
UART
SPI1
WDT
CLKOUT pin
002aae514
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